# help with sw uart

**URL:** <https://community.sparkfun.com/t/help-with-sw-uart/8708>\
**Category:** MicroMod\
**Tags:** msp\
**Created:** [October 9, 2008, 3:55pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708 "2008-10-09T15:55:29Z")\
**Posts on this page:** 8\
**Page:** 1

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**Author:** ![nick836](https://avatars.discourse-cdn.com/v4/letter/n/e5b9ba/32.png) [@nick836](https://community.sparkfun.com/u/nick836)\
**Post date:** [October 9, 2008, 3:55pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/1 "2008-10-09T15:55:29Z")

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Hello.

In my applicatio msp430f427 is interfaced with CC1100.

is there anyone who can help me to realize a software uart for send received packets to pc?

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**Author:** ![leon\_heller](https://yyz1.discourse-cdn.com/sparkfun/user_avatar/community.sparkfun.com/leon_heller/32/7602_2.png) [@leon\_heller](https://community.sparkfun.com/u/leon_heller)\
**Post date:** [October 9, 2008, 4:02pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/2 "2008-10-09T16:02:56Z")

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TI has a couple of code examples for SW UARTs. I think I’ve tried one of them and it worked OK.

Leon

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<div class="post-metadata">

**Author:** ![nick836](https://avatars.discourse-cdn.com/v4/letter/n/e5b9ba/32.png) [@nick836](https://community.sparkfun.com/u/nick836)\
**Post date:** [October 9, 2008, 4:25pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/3 "2008-10-09T16:25:07Z")

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Do you refer to echo program?

I would a SW uart tx only.Could you help me?

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<div class="post-metadata">

**Author:** ![leon\_heller](https://yyz1.discourse-cdn.com/sparkfun/user_avatar/community.sparkfun.com/leon_heller/32/7602_2.png) [@leon\_heller](https://community.sparkfun.com/u/leon_heller)\
**Post date:** [October 9, 2008, 4:36pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/4 "2008-10-09T16:36:42Z")

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This should do what you want:

```auto
#include "msp430x11x1.h"
; ******************************************************************************
; MSP-FET430x110 Demo - Timer_A UART 9600 Echo, HF XTAL ACLK 
;
; Description: Use timer_A CCR0 hardware output modes and SCCI data latch to
; to implement UART function @ 9600 baud. Software does not directly read and
; write to RX and TX pins, instead proper use of output modes and SCCI data
; latch are demonstrated. Use of these hardware features eliminates ISR 
; latency effects as hardware insures that output and input bit latching and 
; timing are perfectly synchronised with timer_A regardless of other 
; software activity. In the Mainloop the UART function readies the UART to 
; receive one character and waits in LPM0 with all activity interrupt driven. 
; After a character has been received, the UART receive function forces exit 
; from LPM0 in the Mainloop which echo's back the received character.
; ACLK = MCLK = TACLK = HF XTAL = 3.579545MHz   
; //*An external 3.579545Hz XTAL on XIN XOUT is required for ACLK*//	  
;
; MSP430F1121
; -----------------
; /|\| XIN|-        
; | | | 3.58Mhz
; --|RST XOUT|-        
; | |         
; | CCI0A/TXD/P1.1|-------->  
; | | 9600 8N1 
; | CCI0B/RXD/P2.2|<--------
;
RXD equ 004h ; RXD on P2.2
TXD equ 002h ; TXD on P1.1
;
; CPU Registers Used
#define RXTXData R4                    
#define BitCnt R5
;
; Conditions for 9600 Baud HW/SW UART, ACLK = 3.579545MHz
Bitime_5 equ 0186 ; ~ 0.5 bit length 
Bitime equ 0373 ; 104 us ~ 9596 baud
;
; M.Buccini
; Texas Instruments, Inc
; March 2002
; ******************************************************************************
;------------------------------------------------------------------------------
            ORG 0F000h ; 
;------------------------------------------------------------------------------
RESET mov.w #300h,SP ; Initialize stackpointer
SetupWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop Watchdog Timer
SetupBC bis.b #XTS,&BCSCTL1 ; LFXT1 = HF XTAL
SetupOsc bic.b #OFIFG,&IFG1 ; Clear OSC fault flag 
            mov.w #0FFh,R15 ; R15 = Delay 
SetupOsc1 dec.w R15 ; Additional delay to ensure start 
            jnz SetupOsc1 ;
            bit.b #OFIFG,&IFG1 ; OSC fault flag set? 
            jnz SetupOsc ; OSC Fault, clear flag again 
            bis.b #SELM1+SELM0,&BCSCTL2 ; MCLK = LFXT1
SetupTA mov.w #TASSEL0+MC1,&TACTL ; ACLK, continous mode
SetupC0 mov.w #OUT,&CCTL0 ; TXD Idle as Mark 
SetupP1_2 bis.b #TXD,&P1SEL ; P1.1/TA0 for TXD function
            bis.b #TXD,&P1DIR ; TXD output on P1
            bis.b #RXD,&P2SEL ; P2.2/TA0 as RXD input
            eint ; General Enable Interrupts
                                            ;
Mainloop call #RX_Ready ; UART ready to RX one Byte
            bis.w #LPM0,SR ; Enter LPM0 Until Byte RXed
            call #TX_Byte ; TX Back RXed Byte Received
            jmp Mainloop ;
                                            ;
;------------------------------------------------------------------------------
TX_Byte ; Subroutine Transmits Character from RXTXData Buffer
;------------------------------------------------------------------------------
            mov.w &TAR,&CCR0 ; Current state of TA counter
            add.w #Bitime,&CCR0 ; Some time till first bit
            bis.w #0100h, RXTXData ; Add mark stop bit to RXTXData 
            rla.w RXTXData ; Add space start bit
            mov.w #10,BitCnt ; Load Bit counter, 8data + ST/SP
            mov.w #OUTMOD0+CCIE,&CCTL0 ; TXD = mark = idle 
TX_Wait bit.w #CCIE,&CCTL0 ; Wait for TX completion
            jnz TX_Wait ; 
            ret ;
                                            ;
;------------------------------------------------------------------------------
RX_Ready ; Subroutine Readies UART to Receive Character into RXTXData Buffer
;------------------------------------------------------------------------------
            mov.w #08,BitCnt ; Load Bit Counter, 8 data bits
SetupRX mov.w #SCS+CCIS0+OUTMOD0+CM1+CAP+CCIE,&CCTL0 ; Neg Edge, cap.          
            ret ;
                                            ;
;------------------------------------------------------------------------------
TA0_ISR ; RXTXData Buffer holds UART Data
;------------------------------------------------------------------------------
            add.w #Bitime,&CCR0 ; Time to next bit
            bit.w #CCIS0,&CCTL0 ; RX on CCI0B?
            jnz UART_RX ; Jump --> RX
UART_TX cmp.w #00h,BitCnt ;
            jne TX_Next ; Next bit?
            bic.w #CCIE,&CCTL0 ; All Bits TX or RX, Disable Int.
            reti ;
TX_Next bic.w #OUTMOD2,&CCTL0 ; TX Mark 
            rra.w RXTXData ; LSB is shifted to carry
            jc TX_Test ; Jump --> bit = 1
TX_Space bis.w #OUTMOD2,&CCTL0 ; TX Space 
TX_Test dec.w BitCnt ; All bits sent (or received)?
            reti ;
                                            ;
UART_RX bit.w #CAP,&CCTL0 ; Capture mode = start bit edge
            jz RX_Bit ; Start bit edge?
RX_Edge bic.w #CAP,&CCTL0 ; Switch to compare mode
            add.w #Bitime_5,&CCR0 ; First databit 1.5 bits from edge
            reti ;
RX_Bit bit.w #SCCI,&CCTL0 ; Get bit waiting in receive latch
            rrc.b RXTXData ; Store received bit
RX_Test dec.w BitCnt ; All bits RXed?
            jnz RX_Next ; Next bit?
;>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
RX_Comp bic.w #CCIE,&CCTL0 ; All bits RXed, disable interrupt 
            mov.w #GIE,0(SP) ; Decode byte = active in Mainloop
;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
RX_Next reti ;
;
;----------------------------------------------------------------------------- 
; Interrupt Vectors Used MSP430x11x1          
;----------------------------------------------------------------------------- 
            ORG 0FFFEh ; MSP430 RESET Vector
            DW RESET ; 
            ORG 0FFF2h ; Timer_A0 Vector
            DW TA0_ISR ; 
            END

```

Leon

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<div class="post-metadata">

**Author:** ![nick836](https://avatars.discourse-cdn.com/v4/letter/n/e5b9ba/32.png) [@nick836](https://community.sparkfun.com/u/nick836)\
**Post date:** [October 9, 2008, 4:39pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/5 "2008-10-09T16:39:31Z")

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sorry, but isn’t this an echo program?

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<div class="post-metadata">

**Author:** ![leon\_heller](https://yyz1.discourse-cdn.com/sparkfun/user_avatar/community.sparkfun.com/leon_heller/32/7602_2.png) [@leon\_heller](https://community.sparkfun.com/u/leon_heller)\
**Post date:** [October 9, 2008, 4:44pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/6 "2008-10-09T16:44:23Z")

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Yes, what is wrong with that?

Leon

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<div class="post-metadata">

**Author:** ![nick836](https://avatars.discourse-cdn.com/v4/letter/n/e5b9ba/32.png) [@nick836](https://community.sparkfun.com/u/nick836)\
**Post date:** [October 9, 2008, 4:46pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/7 "2008-10-09T16:46:51Z")

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i would to realize a software that allow me to send packets received to a pc; then i thing echo program isn’t good…

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<div class="post-metadata">

**Author:** ![leon\_heller](https://yyz1.discourse-cdn.com/sparkfun/user_avatar/community.sparkfun.com/leon_heller/32/7602_2.png) [@leon\_heller](https://community.sparkfun.com/u/leon_heller)\
**Post date:** [October 9, 2008, 5:01pm UTC](https://community.sparkfun.com/t/help-with-sw-uart/8708/8 "2008-10-09T17:01:55Z")

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You’ll have to modify it, of course.

Leon
