Add support for an ARM11 processor in OpenOcd

Add support for Hisilicon SD5113 cpu.

Hello i have two bricked devices with uboot erased, both based on Hisilicon SD5113 cpu, who seems to be ARM11, one have SPANSION S29GL128N, second INTEL JS28F128/M29EWH flashes.

[ [

cpuinfo log when devices was in working state

Processor : ARMv6-compatible processor rev 7 (v6l)
BogoMIPS : 532.48
Features : swp half thumb fastmult edsp java
CPU implementer : 0x41
CPU architecture : 6TEJ
CPU variant : 0x0
CPU part : 0xb76
CPU revision : 7
Cache type : write-back
Cache clean : cp15 c7 ops
Cache lockdown : format C
Cache format : Harvard
I size : 16384
I assoc : 4
I line length : 32
I sets : 128
D size : 16384
D assoc : 4
D line length : 32
D sets : 128

Hardware : SD5113-V100-PILOT-B01
Revision : 0000
Serial : 0000000000000000

Tryed to connect with z-jtag using default source-code.

        ===================================
               zJTAG EJTAG Debrick Utility v1.0
        ===================================

Probing bus ... Done

Detected IR chain Length is 4

CPU Chip ID: 00110011000000000000010010111110 (330004BE)
    CPU Manufacturer :Unknown(id=4BE)
    CPU Device ID :3000
    CPU Revision  :3

*** Detected a CPU but not in build-in list ***

*** You can set /skipdetect let operate continue ***

After i modified source code using arm11 technical reference manual (changed default INSTR_IDCODE 0x01, to default arm11 INSTR_IDCODE 0x1E), recompiled and got this result.

        ======================================
               zJTAG EJTAG Debrick Utility v1.0
        ======================================

Probing bus ... Done

Detected IR chain Length is 4

CPU Chip ID: 01000000011011001001010011000000 (406C94C0)
    CPU Manufacturer :Unknown(id=4C0)
    CPU Device ID :06C9
    CPU Revision  :4

*** Detected a CPU but not in build-in list ***

*** You can set /skipdetect let operate continue ***

Tryed openocd with this config and got this result

#/*******************************************/
interface parport
parport_cable wiggler
adapter_khz 500

got this result

Open On-Chip Debugger 0.6.1 (2013-02-08-21:18)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.sourceforge.net/doc/doxygen/bugs.html
Warn : Adapter driver 'parport' did not declare which transports it allows; assuming legacy JTAG-only
Info : only one transport option; autoselect 'jtag'
adapter speed: 500 kHz
Info : clock speed 500 kHz
Warn : There are no enabled taps.  AUTO PROBING MIGHT NOT WORK!!
Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -expected-id 0x95113003 ..."
Warn : AUTO auto0.tap - use "... -irlen 4"
Warn : gdb services need one or more targets defined

added some lines in config file

#/*******************************************/
interface parport
parport_cable wiggler
adapter_khz 500

jtag newtap arm11 cpu -irlen 5 -ircapture 0x1 -irmask 0xf -expected-id 0x95113003
target create arm11 arm11 -endian little -chain-position arm11.cpu

init
scan_chain

and got this

Open On-Chip Debugger 0.6.1 (2013-02-08-21:18)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.sourceforge.net/doc/doxygen/bugs.html
Warn : Adapter driver 'parport' did not declare which transports it allows; assuming legacy JTAG-only
Info : only one transport option; autoselect 'jtag'
adapter speed: 500 kHz
Info : clock speed 500 kHz
Info : JTAG tap: arm11.cpu tap/device found: 0x95113003 (mfg: 0x001, part: 0x5113, ver: 0x9)
Error: 'arm11 target' JTAG error SCREG OUT 0x1e
Error: unexpected ARM11 ID code
Polling target failed, GDB will be halted. Polling again in 100ms
Polling target failed, GDB will be halted. Polling again in 300ms
   TapName             Enabled  IdCode     Expected   IrLen IrCap IrMask
-- ------------------- -------- ---------- ---------- ----- ----- ------
 0 arm11.cpu              Y     0x95113003 0x95113003     5 0x01  0x0f
Polling target failed, GDB will be halted. Polling again in 700ms
Polling target failed, GDB will be halted. Polling again in 1500ms
Polling target failed, GDB will be halted. Polling again in 3100ms
^C

Tryed with H-Jtag (and got same unknown device as z-jtag founded after i modified IDCODE address)

[

Tryed also with Urjtag

jtag> detect
IR length: 4
Chain length: 1
Device Id: 10010101000100010011000000000011 (0x0000000095113003)
  Unknown manufacturer!
chain.c(149) Part 0 without active instruction
chain.c(200) Part 0 without active instruction
chain.c(149) Part 0 without active instruction
jtag> discovery
Detecting IR length ... 4
Detecting DR length for IR 1111 ... 1
Detecting DR length for IR 0000 ... 430
Detecting DR length for IR 0001 ... 430
Detecting DR length for IR 0010 ... 1
Detecting DR length for IR 0011 ... 1
Detecting DR length for IR 0100 ... 32
Detecting DR length for IR 0101 ... 1
Detecting DR length for IR 0110 ... 1
Detecting DR length for IR 0111 ... 1
Detecting DR length for IR 1000 ... 11
Detecting DR length for IR 1001 ... 28
Detecting DR length for IR 1010 ... 56
Detecting DR length for IR 1011 ... 56
Detecting DR length for IR 1100 ... 15
Detecting DR length for IR 1101 ... 312
Detecting DR length for IR 1110 ... 112

As adapters i use 2 adapters, dlc5 and wiggler both buffered.

Please can someone look on those logs, and try to give me an clue to connect this processor.

Thanks.](ImageShack - picture2.jpg)](ImageShack - intel_flash.jpg)](ImageShack - SPANSION_FLASH.jpg)

about my problem, still no help, i dunno how to connect to this processor, i tell u guys jtag interface is good, jtag pinout from device is correct, but i get strage values for an arm11 core based processor.

at interogation he give me a instr chain length = 4, in conditions arm11 expects a 5bits instr register.

i am stucked here, and dunno what to do, nobody here to give me an clue?

thanks.