I’m a noob at PCB layout, and I need to submit this to a board-house sometime later this week, so I welcome any and all feedback. I’m building a board around an MCU with 100 pin / LQFP / 0.5mm pitch package - so this isn’t exactly an easy starter board…
I was originally going to use batchpcb. But I’m now leaning towards 4pcb.com, which allows 6 mil lines/spacing and min 0.015 hole size. If I go this route it could allow me to dramatically change my routing and even reduce the board size. Any thoughts on this? Does “Min. 0.015” hole size" really mean smaller vias? If so, am I correct in my thinking that this will allow me to run my traces closer, and not require “staggering” the vias like I have now?
A few notes:
I had to use 8mils whenever i connected to the MCU, I tried to use 10 mils for everything else (and 20 for power)
The pin-out order on headers iJP3, JP4, and JP5 is fixed, as it needs to be compatible with another board. (This lead to some challenging routing, and my decision to rotate the MCU 45 degrees.)
There is a ground fill (polygon) on the bottom layer of the board. I left it off for this pic since it makes things easier to see (loaded the file & didn’t do a ‘RATS’).
I can re-post a pic with the fill polygon “turned on” if that makes it easier to review.
I haven’t added my silkscreen yet, I’ll be adding that over the next few days.
EDIT: my pic hosting service is down - it’s also kind of moot at this point, as based on the comments I’ll need to completely re-do the layout anyway.
I was trying all orientations to match MCU pinouts to the pins on the headers (i.e. on the same side of the chip, etc…). It turned out this 45 degree rotation , seemed to have the best match. (actually around 40 deg)
If there’s a reason or rule that this shouldnt be done this way, I’m open to feedback… although I’m not excited about the thought of re-routing again.
I’m not gonna lie, this layout is a disaster for more reasons than I have time to list. You probably need to reroute the whole thing.
Avoid unnecessary angles, especially odd ones. Keep your crystals and caps as close to the CPU as possible. Avoid sharp angle trace connections, I think I even see some acute angles in there. You used a ground plane which is good. If you have extra space, use it to separate traces instead of putting minimum width traces the minimum distance apart…you’re asking for manufacturing errors. 10mil is pretty skinny, 12 or 16 mil is a lot safer if you have the room. Finally just google around and look at other people’s routing jobs.
Thanks for the candid feedback, macegr. That’s the type of thing that I was looking to hear, unfortunately it wasnt the news I wanted.
At a minimum, it was a good exercise in learning the hotkeys in Eagle. ha. It also has me motivated to find another layout engineer (to replace one that I just lost).
I did really try to get the caps and crystals as close to the MCU as possible. It just didnt seem like I had much room with the very small pitch.
Nobody’s going to do it perfect the first time. And you know what…the layout might actually have worked. It just isn’t pretty and has a high risk of manufacturing errors. Learning the CAD tool is important. I would suggest playing with the various trace styles available in Eagle. Just right-click while routing to switch corner type. Right angles are good, you can go back later and add miters. The 45 degree angles and the curves are also good. You don’t see free angle traces anywhere except where absolutely necessary.
Thanks for the great idea on using the layout type selector. I’ll try that.
Ironically, my angles have started out at nice 45 or 90 deg angles. The problem is that later i come along and move the part (usually to fit in another trace), and thus i get the random angles.
I’m re-doing the design. I’ve set the MCU straight, no 45 deg twist, and I’ve taken all the extra circuitry off for now (USB stuff, vreg, etc…)
I’m going to layout just the MCU, Caps, and PU resistors and then post it for feedback. That way, I wont be as committed to a layout when i get feedback.
Thanks again, and I’ll post the start of my new layout in the next day or so.
(I really appreciate your help. Most of the PCB routing info/tutorials on the internet are very basic, and dont deal with SMT stuff nor have good examples about decoupling cap placement.)
Out of curiosity, why aren’t you using Eagle’s autorouter (unless of course you’re purposely doing manual layout for the learning experience) ? While the autorouter will occasionally do some weird things, more often than not I find it does something reasonable, at least for the type of projects that I’m working on.
The Eagle autorouter couldn’t do much with this. The most it could get was 74% complete, and the way if it left things it made it almost impossible to complete the remaining routes.
Perhaps the MCU pitch has something to do with it. It’s a .5mm pitch with about .2 clearance between pins. In fact I had to edit the library and slightly reduce the pad size of the MCU pins to pass the BatchPCB DRU check. Otherwise, the pins themselves were causing ‘clearance’ errors.
Based on the feedback, I’ve completely changed my approach, and I think I have a much cleaner PCB started. I’ll post what I have in a day or so.
AZRobbo:
The Eagle autorouter couldn’t do much with this. The most it could get was 74% complete, and the way if it left things it made it almost impossible to complete the remaining routes.
Hmmm… that’s odd. You might try adjusting the routing grid setting (I think I usually run at 5 or 10 mils) or check some of the DRC settings. I’ve made a few boards with components packed very tightly and even in the worst case it ends up at 98%. You can try running a DRC check against the layout you manually routed and see if produces DRC errors that give some insight into which DRC setting might be causing it to refuse to route.
I was running it at 8 when I had the problems. I just re-ran it at 1 and it worked. However, it took forever, and it isn’t exactly pretty. (Even my ill fated attempt in the original post, looks cleaner.)
After this recent test, the auto-router is definitely something I’ll keep in mind; especially now that I know someone who uses it without problems. Originally, I ran into problems, then saw a lot of negative posts about it. So, I just assumed it wasn’t an option.
For the time being, I’m going to try to learn to route manually. As long as I have enough time, and keep getting good feedback, I’ll try to stick it out, and hopefully gain a new skill.
Try going to Tools then select Auto. You’ll see that the default routing grid is quite large. (I forgot what it was set to be default) Try changing it to a much smaller number. This tells the autorouter how fine the grid will be when the auto router is choosing it’s routes. When it’s set big it will fail a lot of routes. Setting it to something like 5 mil will probably solve your routing problems. I had something like 2 air routes that it couldn’t route for my board so I did those by hand.
Thanks for your feedback, I do appreciate your input.
The default routing grid was the setting that I was referring to in my previous post. It was originally set at something insane like 20 or 50. Initially I ran it at a setting of 8, this resulted in a 74% completion. If I set it to 1, I can sometimes get 100% completion.
I respect the fact that the auto-router can do good work, and can be useful in the right situation. I just don’t think this is a good situation for it. This design has a 100 pin MCU with .5mm pitch, and five headers that each have connections to multiple sides of the MCU. (I also can’t reorder the pins on the headers, as they need to be pin compatible with another module; that would solve a lot of problems.)
So, for this project, I’m going to manually route it.