Hi, I would like to use OpenOcd with Atmel AT91RM9200 controllers.
I’m using the folowing configuration file, but it doesn’t work.
telnet_port 4444
gdb_port 3333
interface ft2232
ft2232_device_desc “Olimex OpenOCD JTAG A”
ft2232_layout “olimex-jtag”
ft2232_vid_pid 0x15BA 0x0003
jtag_speed 2
reset_config trst_and_srst
jtag_device 4 0x1 0xf 0xe
daemon_startup reset
target arm920t little run_and_halt 0 arm920t
run_and_halt_time 0 30
daemon_startup reset
I get the folowing error:
bauknecht thomas # /usr/local/bin/openocd -f at91-openocd.cfg Info: openocd.c:84 main(): Open On-Chip Debugger (2006-01-25 11:30 CET)
Error: jtag.c:1202 jtag_examine_chain(): number of discovered devices in JTAG chain (20) doesn’t match configuration (1)
OpenOcd’s documentation mentions that arm7/9 devices have a 4 bits instruction register, but the boundary scan file provided by Atmel (at91rm9200_pqfp.bsd) reads as folows:
– Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of top_thunder: entity is 3;
I very much apreciate any advice on the matter,
have a nice day,
Thomas
Hi,
after interrupting the power supply everything seems to work perfectly.
All by all everything seems straightforward now.
Thanks for the great software libre, cheers for the community!
Hi,
I want to write the nor flash of a KB9202 demo board (with AT92RM9200) via openocd.
It is a 16megabyte TE28F128J3C device by Intel, and supports the CFI.
There is 32MB of sdram available at 0x20000000.
I’m learning, and good advice and pointer are most welcome.
Does this configuration seem sane? Is working area in the ram needed?
When using this configuration I can succesfully dump_binary the contents of
the flash, but flash probe 0 fails with:
Open On-Chip Debugger
flash probe 0
probing failed for flash bank ‘#0’ at 0x10000000
Thanks in advance,
Thomas
telnet_port 4444
gdb_port 3333
interface ft2232
ft2232_device_desc “Olimex OpenOCD JTAG A”
ft2232_layout “olimex-jtag”
ft2232_vid_pid 0x15BA 0x0003
jtag_speed 2
reset_config trst_and_srst
jtag_device 4 0x1 0xf 0xe
daemon_startup reset
target arm920t little run_and_halt 0 arm920t
run_and_halt_time 0 30
daemon_startup reset
working_area 0 0x20000000 0x01000000 nobackup
flash bank cfi 0x10000000 0x01000000 2 2 0
Hello Thomas,
if the flash is connected to CS0, and if it’s connected 16-bit wide (it seems to be accroding to the schematics), then yes, your configuration file should be fine.
Could you send me a log file (run with “-f -d -l ”) to Dominic Rath gmx de?
Regards,
Dominic
Hi Dominic,
The schematic of the board ( http://www.kwikbyte.com/docs/KB9202SCH.pdf ) indicates that CS0 is connected to the chip, but CS1 has to be driven to enable adress and databus latches (there is NOR and NAND flash, and an LCD connected to those latches).
I’m not familiar with the openocd internals, would it be hard to hack up
support for this myself?
We’re developing our own AT91RM9200 board for use in our college to learn and provide our successors with in-house knowledge.
We’re just using this one as reference material.