Hi all, please forgive me as I am new to ARM and external ram.
I have an application that requires downloading a ~1-2 MB lookup table of 128 or 256bit values via ethernet and performing lookups. I want to be able to look up one of these 128 or 256 bit values from the table in less than 200ms! I assume that in order to achieve that speed I will need to transfer the table to RAM or very fast flash (does it exist?).
I like the look of stellaris MCUs due to their integrated mac+phy and cortex core. However the appear to only support a 16 bit wide bus as apposed to NXP’s TDMI parts which have a 32 bit wide bus. Is the difference in ram bus widths significant (twice as many reads? does ram even commonly come in 32 bit wide parts?)
Do you think that scanning 1-2MB in 200ms is possible with these cores or would I be better off looking at an arm9 core?
Mobs:
Do you think that scanning 1-2MB in 200ms is possible with these cores
Are you thinking that, in the worst case, you will need to search every item in the 1-2Mb to find a specific value? If so, you should investigate whether you can store the data in numerical order and use a binary search to locate an item instead of scanning the data sequentially. That way you will only need a maximum of ~16 memory accesses to find an item rather than 65000+ accesses. That should greatly simplify your task of finding suitable hardware.
Mobs:
Do you think that scanning 1-2MB in 200ms is possible with these cores
Are you thinking that, in the worst case, you will need to search every item in the 1-2Mb to find a specific value? If so, you should investigate whether you can store the data in numerical order and use a binary search to locate an item instead of scanning the data sequentially. That way you will only need a maximum of ~16 memory accesses to find an item rather than 65000+ accesses. That should greatly simplify your task of finding suitable hardware.
Thanks cfb! as the data is coming from the PC I was planning to have it binary sorted or similar before it was sent to the device. I guess I got a bit carried away with the numbers and didn’t realise just how many reads it would save.
A quick back of envelope calculation. Assuming Cortex at 80MHz with 16 bit external RAM at 50MHz.
A loop with 10 cycles to search 2MB of data (e.g. 1e6 entries at 16 bits each) has worst case of 10e6 cycles, at clock rate of 80MHz is 10e6/80e6 = 125ms. If the external bus is 50 MHz, reckon 10e6/50e6 = 200ms.
So we are pushing the limit already, careful coding might reduce the number of instructions, but it’s unlikely in practice to achieve theoretical max data rates, so there would be little margin for error. I would try to refine the calculation to get a better idea of the risk, preferably backed by some benchmarks from a similar target.
OTOH, a 200MHz ARM9 with a 32 bit memory at 100MHz would get nearer to 50ms (on paper!). It might still require some careful coding I think, but has more headroom.
ETA: Ninja’d!
If you have only 16 accesses Flash is surely doable.
Mobs:
Hi all, please forgive me as I am new to ARM and external ram.
I have an application that requires downloading a ~1-2 MB lookup table of 128 or 256bit values via ethernet and performing lookups. I want to be able to look up one of these 128 or 256 bit values from the table in less than 200ms!
can you use hash coding or binary trees to do this?
Considered using an ARM with megabyte sized RAM (ARM9?)