Configuration of SMCLK

Hello forum members,

I am using following code to output ACLK, SMCLK and MCLK on corresponding port pins.

void OutputMCLK (void)

{

P5DIR |= 0x10; // Select MCLK as output

P5SEL |= 0x10; // Select system functionality

}

void OutputSMCLK (void)

{

P5DIR |= 0x20; // Select SMCLK as output

P5SEL |= 0x20; // Select system functionality

}

void OutputACLK (void)

{

P5DIR |= 0x40; // Select ACLK as output

P5SEL |= 0x40; // Select system functionality

}

Following is the clock configuration code:

__SelectCrystalOsc proc

BIC #OSCOFF,SR // Turn on osc.

BIS.B #XTS+DIVA_1,BCSCTL1 // HF mode //ACLK Divide by 2

L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG

MOV #0FFh,R15 // Delay

L2 DEC R15

JNZ L2

BIT.B #OFIFG,&IFG1 // Re?test OFIFG

JNZ L1 // Repeat test if needed

BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK

BIS.B #DIVM_3,&BCSCTL2 // Mclk divide by 8 (crystal 1Mhz MCLK=250KHz)

BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK

BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8 (crystal 1Mhz SMCLK=250KHz)

ret

endproc

With above code, I am getting proper output at ACLK = 250KHz and MCLK = 1MHz but SMCLK is working at 18 Hz which should be 250KHz. Please clarify the problem in code.

Thanks in advance.