Hi,
I’m looking for an alternative way for implementing interrupt service routines.
Actually I’m just implementing the functions defined in the vector table. If an event occurs the function defined in the vector table gets called. Is there an alternative way for calling ISR’s without jumping into the vector table and then into the ISR?
Thx
Not sure what you’re trying to do here, but the vector table is a list of addresses of routines that will be executed on interrupt. It can be in Flash, RAM or ROM depending on memory mapping.
So when the interrupt occurs, the vector is read and the PC is loaded with the value. This is actually streamlined and much faster than the old EVIC of the ARM7s. Plus you don’t have to figure out in the interrupt routine which device got your there. Now you know which device, you just have to figure out which operation of that device.
Now you can force an interrupt with software by writing to the STIR register.
Or you could disable the interrupts in question, and look at the pending interrupt bits (a lot slower).
A little description of what you’re trying to do would help us point you on your way.
What I’m trying to do is to implement an ISR for the timer2. Therefor i got this in my startup file
.word TIM2_IRQHandler
…
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
So I have just to implement a function called TIM2_IRQHandler and this will be called if an interrupt occurs.
The way it works is like:
interrupt occurs → get the IRQ Handler from vector table → jump into the handler… or isn’t it? If it is like that, my question is, whether there is another way to do that or not.
Thx
So I have just to implement a function called TIM2_IRQHandler and this will be called if an interrupt occurs.
That’s all you need to do.
For the timer, the interrupt flag has to be cleared in your TIM2_IRQHandler.
gladio it sounds like you’re trying to figure out if there is a way to avoid the time that is spent (wasted) getting the address from the vector table.
The [Insider’s Guide from Hitex has a nice explanation. Basically, when an interrupt occurs, the processor automatically pushes R0-R3, R12, LR, PC, and xPSR onto the stack (using the RAM/Data bus), which takes 12 cycles. Since the cortex has a Harvard architecture, it fetches the address (usng the Flash/Instruction bus) at the same time. I’m not aware of any way to avoid this overhead with a cortex-m3.
The FIQ available in e.g. LPC2148 can avoid some of this, at least part of the time. Others with more experience might comment on how much overhead the FIQ tends to save in real world applications.](http://www.st.com/mcu/files/mcu/1221142709.pdf)
yes, you’re right. I try to find another way to get the address which may be faster than getting it from the vector table.
I’m using the STM32F103RB and it’s seems like there is no other way than to implement the interrupt handler defined in the vector Table.