Changed the node name from gd25q128: gd25q128c@0 to w25q128: w25q128@0 to match the actual flash chip (Winbond W25Q128).
Updated the compatible property to include “winbond,w25q128” as the first option, followed by the generic “jedec,spi-nor”.
Corrected the jedec-id to [ef 40 18], which should be the correct JEDEC ID for the W25Q128
These changes should resolve the compilation issues you were experiencing. Make sure to include any necessary include files at the top of your DTS file, such as the STM32F4 pinctrl definitions. If you’re still encountering issues, double-check that your Zephyr SDK and toolchain are up-to-date, and that you’re using the correct DTS bindings for your specific version of RTOS
The error message suggests there’s a syntax issue in your device tree source (DTS) file. Let’s try to address this:
The error is occurring on line 167 of your DTS file. Can you double-check what’s on that line? It seems the compiler is expecting a number or a parenthesized expression but found something else.
The includes you’ve provided look correct for an STM32F405 board. However, let’s make sure you have all the necessary includes. You might want to add:
#include <zephyr/dt-bindings/gpio/gpio.h>
This include is often necessary for GPIO definitions like GPIO_ACTIVE_LOW
Let’s review the SPI3 node again. Here’s a slightly modified version that might help:
dts
The main issue I had was to incorrectly determine the memory type from the ref manual based on the chip I’m using. The type 40 was incorrect and had to be 70 in the jedec-id.
Thanks for your support
regards
Einar
Hi again.
I have been working on creating the routines to read/write/initialize the flash memory and I seem to have some issues with writing to offsets larger than 2097152 bytes, even though the chip is specified as 16777216 bytes.
The value 2097152 could be calculated as 32768 * 64, meaning I am able to write to only 64 blocks (not sectors, since they are 4096). This seems a bit strange to me so I wonder if there is something wrong or missing from my device tree specification? or is this chip not supported properly in Zephyr?