Device tree support in Zephyr for NOR flash (Winbond)

Hi there

I am doing some development on the Micromod board with STM32f405 and was wondering if anybody could help me setup my DTS file for the external NOR flash that is on the board. I think the flash is W25Q 128Mbit, see here: https://cdn.sparkfun.com/assets/a/d/8/c/7/21326-MicroMod_STM32_Processor-Schematic.pdf

I have tried to do the following in my dts file but that is failing when being compiled:

&spi3 {
	pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
	pinctrl-names = "default";
	status = "okay";
	cs-gpios = <&gpioc 3 GPIO_ACTIVE_LOW>;  /* PC3 as CS */

	gd25q128: gd25q128c@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <80000000>;
		size = <0x1000000>;  /* 16MB (128Mbit) */
		has-dpd;
		t-enter-dpd = <20000>;
		t-exit-dpd = <100000>;
		jedec-id = [ c8 40 15  ];  /* Replace with the actual JEDEC ID if necessary */
	};
};

/* Pinmux configuration for SPI3 */
&spi3_sck_pc10 {
	pinmux = <STM32F4_PINMUX_FUNC_PC10_SPI3_SCK>;
};

&spi3_miso_pc11 {
	pinmux = <STM32F4_PINMUX_FUNC_PC11_SPI3_MISO>;
};

&spi3_mosi_pc12 {
	pinmux = <STM32F4_PINMUX_FUNC_PC12_SPI3_MOSI>;
};

The W25Q 128Mbit flash you mentioned is indeed present on the board according to the schematic you linked.

Accordingly, here’s a modified version of your DTS file for the external NOR flash:

&spi3 {
    pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
    pinctrl-names = "default";
    status = "okay";
    cs-gpios = <&gpioc 3 GPIO_ACTIVE_LOW>;            /* PC3 as CS */

    w25q128: w25q128@0 {
        compatible = "winbond,w25q128", "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <80000000>;
        size = <0x1000000>;  /* 16MB (128Mbit) */
        has-dpd;
        t-enter-dpd = <20000>;
        t-exit-dpd = <100000>;
        jedec-id = [ef 40 18];
    };
};

/* Pinmux configuration for SPI3 */
&spi3_sck_pc10 {
    pinmux = <STM32F4_PINMUX_FUNC_PC10_SPI3_SCK>;
};

&spi3_miso_pc11 {
    pinmux = <STM32F4_PINMUX_FUNC_PC11_SPI3_MISO>;
};

&spi3_mosi_pc12 {
    pinmux = <STM32F4_PINMUX_FUNC_PC12_SPI3_MOSI>;
};

Here are the key changes and explanations:

  1. Changed the node name from gd25q128: gd25q128c@0 to w25q128: w25q128@0 to match the actual flash chip (Winbond W25Q128).
  2. Updated the compatible property to include “winbond,w25q128” as the first option, followed by the generic “jedec,spi-nor”.
  3. Corrected the jedec-id to [ef 40 18], which should be the correct JEDEC ID for the W25Q128

These changes should resolve the compilation issues you were experiencing. Make sure to include any necessary include files at the top of your DTS file, such as the STM32F4 pinctrl definitions. If you’re still encountering issues, double-check that your Zephyr SDK and toolchain are up-to-date, and that you’re using the correct DTS bindings for your specific version of RTOS

Hi @TS-Russell and thank you for your input. I’m sorry for my late answer as well :-/

I am getting the same error as before that the dts compiler is complaining about the following:

devicetree error: /workspaces/test/boards/sparkfun/sparkfun_micromod_stm32/sparkfun_micromod_stm32.dts:167 (column 12): parse error: expected number or parenthesized expression

-- In: /workspaces/test/build/zephyr, command: /usr/bin/python3;/home/test/zephyrproject/zephyr/scripts/dts/gen_defines.py;--dts;/workspaces/test/build/zephyr/zephyr.dts.pre;--dtc-flags;'';--bindings-dirs;/workspaces/test/dts/bindings;/home/test/zephyrproject/zephyr/dts/bindings;--header-out;/workspaces/test/build/zephyr/include/generated/zephyr/devicetree_generated.h.new;--dts-out;/workspaces/test/build/zephyr/zephyr.dts.new;--edt-pickle-out;/workspaces/test/build/zephyr/edt.pickle;--vendor-prefixes;/home/test/zephyrproject/zephyr/dts/bindings/vendor-prefixes.txt

Is there something missing in my include which is the following:

#include <st/f4/stm32f405Xg.dtsi>
#include <st/f4/stm32f405rgtx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>

regards

The error message suggests there’s a syntax issue in your device tree source (DTS) file. Let’s try to address this:

  1. The error is occurring on line 167 of your DTS file. Can you double-check what’s on that line? It seems the compiler is expecting a number or a parenthesized expression but found something else.
  2. The includes you’ve provided look correct for an STM32F405 board. However, let’s make sure you have all the necessary includes. You might want to add:
#include <zephyr/dt-bindings/gpio/gpio.h>

This include is often necessary for GPIO definitions like GPIO_ACTIVE_LOW

  1. Let’s review the SPI3 node again. Here’s a slightly modified version that might help:
    dts
&spi3 {
    pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
    pinctrl-names = "default";
    status = "okay";
    cs-gpios = <&gpioc 3 GPIO_ACTIVE_LOW>;

    w25q128: w25q128@0 {
        compatible = "winbond,w25q128", "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <80000000>;
        size = <0x1000000>;  /* 16MB (128Mbit) */
        jedec-id = [ef 40 18];
    };
};

I’ve removed the has-dpd, t-enter-dpd, and t-exit-dpd properties as they might not be necessary and could potentially cause issues if unsupported.

  1. Make sure your pinctrl nodes are correctly defined:

dts

&pinctrl {
    spi3_sck_pc10: spi3_sck_pc10 {
        pinmux = <STM32_PINMUX('C', 10, AF6)>;
    };

    spi3_miso_pc11: spi3_miso_pc11 {
        pinmux = <STM32_PINMUX('C', 11, AF6)>;
    };

    spi3_mosi_pc12: spi3_mosi_pc12 {
        pinmux = <STM32_PINMUX('C', 12, AF6)>;
    };
};
  1. If you’re still encountering issues, it might be helpful to see more of your DTS file, particularly around line 167 where the error is occurring.
  2. Lastly, ensure that your Zephyr SDK and toolchain are up to date, as older versions might have issues with certain DTS constructs.

If you’re still facing issues after trying these suggestions, you might want to post on a zephyr-centric forum and provide:

  1. The content of line 167 and a few lines before and after it.
  2. The full error message, including any warnings that precede it.
  3. The version of Zephyr you’re using.

Hi @TS-Russell I just wanted to inform you that the dts below is now working

&spi3 {
    pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
	pinctrl-names = "default";
    status = "okay";
    cs-gpios = <&gpioc 3 GPIO_ACTIVE_LOW>;

    w25q128jv: w25q128s@0 {
        compatible = "winbond,w25q128jv", "jedec,spi-nor", "st,stm32-spi-nor";
        reg = <0>;
        spi-max-frequency = <80000000>;
        size = <0x1000000>;  /* 16MB (128Mbit) */
        jedec-id = [ef 70 18];
		has-dpd;
        t-enter-dpd = <20000>;
        t-exit-dpd = <100000>;
    };
};

The main issue I had was to incorrectly determine the memory type from the ref manual based on the chip I’m using. The type 40 was incorrect and had to be 70 in the jedec-id.
Thanks for your support
regards
Einar

Excellent work - thanks for posting the update!

Hi again.
I have been working on creating the routines to read/write/initialize the flash memory and I seem to have some issues with writing to offsets larger than 2097152 bytes, even though the chip is specified as 16777216 bytes.
The value 2097152 could be calculated as 32768 * 64, meaning I am able to write to only 64 blocks (not sectors, since they are 4096). This seems a bit strange to me so I wonder if there is something wrong or missing from my device tree specification? or is this chip not supported properly in Zephyr?

Regards
Einar

Try asking this same thing in a zephyr forum