Dowloading code to external CFI flash

Development Boards MicroMod
1

Hello,

I’ve been playing with my CS-EP9302 board from Olimex and OpenOCD. It has a Cirrus Logic ARM920T EP9302 processor running at 200MHz, 32MB RAM mapped at 0xc0000000 and 16MB Intel Flash (cfi) at 0x60000000.

I’m trying to upload my ELF binary to the FLASH chip onboard, however I haven’t been having much success…

I can connect through jtag just fine with the following config file:

telnet_port 4444
gdb_port 3333
interface ft2232
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x0004
jtag_speed 2
reset_config trst_and_srst srst_pulls_trst
jtag_device 4 0x1 0xf 0xe
daemon_startup reset
target arm920t little run_and_halt 0
run_and_halt_time 0 30
working_area 0 0xc0000000 0x00400000 nobackup
flash bank cfi 0x60000000 0x01000000 2 2 0

I think my flash config is correct because I can successfully probe the flash chip and show info on it:

Open On-Chip Debugger
> halt
requesting target halt...
> Target 0 halted
target halted in ARM state due to debug request, current mode: Supervisor
cpsr: 0x200000d3 pc: 0x80014040
MMU: disabled, D-Cache: disabled, I-Cache: disabled
> flash probe 0
flash 'cfi' found at 0x60000000
> flash info 0
#0: cfi at 0x60000000, size 0x01000000, buswidth 2, chipwidth 2
        #0: 0x00000000 (0x20000kB) erase state unknown, protection state unknown
...
        #127: 0x00fe0000 (0x20000kB) erase state unknown, protection state unknown

cfi information:

mfr: 0x0089, id:0x0018
qry: 'QRY', pri_id: 0x0001, pri_addr: 0x0031, alt_id: 0x0000, alt_addr: 0x0000
Vcc min: 2.7, Vcc max: 3.6, Vpp min: 0.0, Vpp max: 0.0
typ. word write timeout: 64, typ. buf write timeout: 128, typ. block erase timeout: 1024, typ. chip erase timeout: 1
max. word write timeout: 256, max. buf write timeout: 1024, max. block erase timeout: 4096, max. chip erase timeout: 1
size: 0x1000000, interface desc: 2, max buffer write size: 5

intel primary algorithm extend information:
pri: 'PRI', version: 1.1
feature_support: 0xce, suspend_cmd_support: 0x1, blk_status_reg_mask: 0x1
Vcc opt: 3.3, Vpp opt: 0.0
protection_fields: 1, prot_reg_addr: 0x80, factory pre-programmed: 8, user programmable: 8

Next, I try to upload the ELF binary like this:

> flash write_image obj/exec.elf 0 elf
wrote 332 byte from file obj/exec.elf in 48s 962350us (0.006622 kb/s)

Then I want to make sure it was all written correctly like this:

> mdw 0x60000000 4
0x60000000: ffff0016 ffffffff ffffffff ffffffff

As you can see, the ELF file doesn’t seem to be downloaded correctly… I get a few of the following lines while writing the image:

Error:   arm7_9_common.c:563 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: 4

Does anyone have any idea what could be wrong? Is it possible that the timings aren’t set up properly for my flash chip?

Thanks!

2

Hi,

I’ve never used the EP9302 board, but I’ve got the EP9301 here, and these are mostly similar.

You should always flash out of a predefined state. When you’re using “run_and_halt” as the reset mode the core is probably somewhere in its internal bootloader (the Ethernet MAC FIFO RAM starts at 0x80014000, which is where you halted the core), and you can’t know how the target is currently configured.

Try issuing a

“reset halt”

on the telnet interface, followed by executing this script: http://mmd.ath.cx/openocd/cfgs/cs_ep9301_init.script

It configures the clocks and SDRAM for 166/66 MHz operation, but these settings should work well for your board, too.

Make sure the flash sectors are erased (flash erase 0 ), and try flashing a plain binary first (arm-xxx-objcopy -O binary , then flash with "flash write_binary ).

Error: arm7_9_common.c:563 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: 4

is a timeout while accessing the target’s memory system via JTAG - normally this shouldn’t happen. You could try decreasing the JTAG frequency (higher jtag_speed divisor value) if the problem persists.

Best regards,

Dominic