Eagle Routing

Call me lazy, call me crazy, but when laying out my designs I have always relied on the autorouter. I know its less than optimal, but for a board of any complexity, routing by hand would take me days. I have found that with good component placement (and sometimes a two stage routing), Eagle can do a good enough job for my modest needs.

I now am doing my first board with SMT components (some SOIC chips) and have run into a problem. I defined a ground plane on the bottom layer assuming that most routing would take place on the top (due to SMT). However, when I fired up the autorouter, I discovered that Eagle doesn’t realize when a matching plane is below an SMT component. That is, rather than add a via to connect the ground pin of an SMT component to the ground plane below, Eagle will route on the top layer to who knows where. This seems like a significant oversight and am wondering if its user error. This doesn’t happen with pin-thru components since every pin is also a via.

I am also wondering if anyone has had any luck combining hand routing and auto routing (for less important parts). With the auto router, I try it, then rip it up and make adjustments and then try again. However, I cannot figure out how to tell Eagle to ripup only the autorouter traces and leave my hand routed traces alone. Likewise, if I manually place some named via’s (to bring the ground plane to the top layer in strategic places), those via’s get ripped up when using “ripup-all” to remove a bad autorouter run.

Essentially I am looking for a “ripup autoroute traces but leave my manually routed traces/vias alone please” command. Anybody know if such a thing exists? Thanks!

most designers don’t use autorouters for a lot of reasons documented in many places.

what are you telling the autorouter about which layers to use? there are settings to (supposedly) allow you weight each layer for the autorouter.

What I would do is find ground connections and manually make a via connection. then let the autorouter try to do its thing.

Note that smt designs are harder to route. you usually cant run a trace betwen 2 pins which forces a more circuitous route making it harder over all. you may discover, depending on complexity of your board, that the autorouter may not complete for you.

I favor auto routers for one purpose. I route the easiest stuff (about 25%-50% of the board) then run autoroute. I’m amazed this technique actually work for my new super fine pitched board. Autorouters can be really dumb. They will route a connection all the way around the board when all you need is 1-2 vias for a shorter connection. If you do use the autorouter check the Xtal connections(and other high freq. con.) as those need to be as short as possible.

Essentially I am looking for a “ripup autoroute traces but leave my manually routed traces/vias alone please” command. Anybody know if such a thing exists?

Vraz,

Sortof. Do you know that you can left-click on each individual segment of a route to rip-up only that section? Ripping up an airwire or (I think) right-clicking a net will ripup all traces and vias, which I rarely find useful.

If you have many auto-route traces to redo or your board is large this might not be practical, but it’s usually how I re-route, even when I route by hand. (Beware the stubby segments that can’t be selected without ripping up the airwire by accident. For those, grab them with the Move tool to make them longer, then rip them up.)

Cheers,

Richard

I want a compromise where I can share the work with the autorouter. Its obvious that as my designs get more complex they quickly exceed the capability of the autorouter. On the other hand, complete manual routing an even semi-complex board is very time consuming.

I managed to route this board by a combination of manual and auto router. I am pleased with the result but would like to optimize the process to avoid fighting Eagle. The procedure I used:

1- Manually routed all supply pins. This was relatively easy.

2- Ran the auto router to see what Eagle would do with the rest.

3- Noticed a couple places where the auto router was having big problems.

4- Rip up the auto router work without ripping up my manual routing.

This is a problem. Without a “rip up only auto routed traces” command, I had to look for alternates. The best I found was “ripup but exclude named nets”. In this case, “ripup ! gnd +12v +5v”. Works great for supply where the majority of traces share two or three names.

5- Manually routed some traces that traversed the board and were giving the auto router fits.

6- Ran the auto router to see what Eagle would do with the rest.

7- Found places where the auto router had done a good job.

8- Rip up the “bad” auto router work while keeping the “good” auto router work plus my manual routing.

Used the “info” command to get the names of “good” traces and added them to the ripup exclusion list. Fortunately the Eagle command line interface will let you recall/edit the last command so adding additional names does not require entry from scratch.

9- Repeat steps 5-8 until the board was complete.

At completion the rip up command was “ripup ! gnd +5v +12v mosi sck miso reset tx rx led1 led2 n$1 n$2 rc0 rc1;” and this was a small board with only 2 SOIC-20 and 3 SOIC-8. While it worked, it felt clunky. More importantly, Eagle doesn’t save the command line history with the board so forgetting to write down the latest rip up command is a big problem.

So while the basic procedure of manual routing + incremental use of the auto router seems like a winner, I cannot figure out a good way to deal with ripping up just the traces I want. In a perfect world each trace would have a flag indicating whether it should be in the “easy to rip up” group with manual traces defaulting to “no”, auto routed traces defaulting to “yes” and the ability to toggle the status.

At one point I thought I had a solution by creating extra net classes and assigning traces to a “ripup” / “no ripup” class as appropriate. However, I cannot figure a method to get Eagle to use a class name as a rip up target (only net names seem to work). So if anyone had advice/ideas on how to do this, I would like to hear it.

Philba: As part of my manual routing I placed the vias and that eliminated most of the issue. I found that changing the costs slightly (dropped via cost and increased bottom layer routing cost) improved the auto router performance. With that said, its clear the auto router is too limited for turnkey layout and I simply hope to use it for “clean up” and “suggestions” to speed up manual routing.

Richard: I use manual rip up when manually routing. The real problem is the bulk rip up required when the auto router has “gone bad”. And of course, “undo” does not work on the auto router.

Vraz:
I want a compromise where I can share the work with the autorouter. Its obvious that as my designs get more complex they quickly exceed the capability of the autorouter. On the other hand, complete manual routing an even semi-complex board is very time consuming.

I guess I don’t have your aversion to manual routing. At one time, I shared your opinion but as I have routed more (and more complex) boards, I’ve become proficient at manual routing. You sound like you are on that trajectory as well. I really tried to get the autorouter to work for me but gave up.

I recently did the follwing layout manually - it took me around 2 hrs to do though I’ve tweaked it a bit after the initial layout. http://www.geocities.com/pcbs4less/icd2brd.gif

The autorouter only gets to 83% on this one and the traces it lays down look like crap.

I recently did the follwing layout manually - it took me around 2 hrs to do though I’ve tweaked it a bit after the initial layout.

Nice board. My desire to leverage the auto router is that I cannot do manual layout so quickly. Here is the board mentioned in my prior post. It took me 6 hours and that was with the auto router helping. Granted, a chunk of time was me experimenting to find the best way to leverage the auto router.

I am fairly pleased with the result (only 12 vias) but am sure it would go quicker if I could more easily share the work with the auto router. Of course the real fun starts when you realize your mistakes after layout is complete (like the missing bypass capacitors). Doh!

http://home.comcast.net/~vraz/driver-2.png

you will find it goes a lot faster for each board. It took me around 6 boards to get pretty comfortable pounding out the traces.

your board shows a lot of the signs of an autorouted board - odd pad entry/exit angles (look at pin 2 and 3 of the 2313), wierd squiggles (near pins 18-20 of the 2313, for example). does it pass DRC? It looks close in a couple of places. My guess is you have some off-grid parts which the AR really chokes on.

I really try to use 45 degree angles rather than 90 - it creates fewer reflections and you can usually get a shorter path. One other thing I do is to try to get as much clearance as possible. Autorouter won’t do that. Board houses don’t always do a great job. I try not to push their limits. Every little bit I can do to make it easier for them to give me a working board is good.

Do you know that you can ripup a single segment of a routed trace and then reroute it?

Good luck

Phil

The autorouter only gets to 83% on this one and the traces it lays down look like crap.

Yeah, and then there’s the practical side… when you exceed the free Eagle license, you have to decide whether it’s worth the extra $400 to buy the auto-router module. I opted to save the money, since I’d end up manually reworking most of the autorouter traces anyway…

your board shows a lot of the signs of an autorouted board - odd pad entry/exit angles (look at pin 2 and 3 of the 2313), wierd squiggles (near pins 18-20 of the 2313, for example). does it pass DRC? It looks close in a couple of places. My guess is you have some off-grid parts which the AR really chokes on.

If I set DRC to "check grid" the resulting report is a horror show but I cannot figure out what is wrong. These are standard SOIC parts (50 mil pins) placed on a 25 mil grid. It seems straightforward and the parts are snapped to the grid, but maybe the pads are still wrong. I checked the packages and they show as being aligned to 25 mil. I have the autorouter set to 25 mil and also use it for my manual routing.

Funny you should ask about DRC. It passed though I had not updated the settings (so it passed at 8 mil). I always go with 10 mil clearance and 25 mil copper/edge (as you note-- not pushing the limits improves chances on getting a good board).

I have subsequently done an optimization pass so it now passes at 10 mil, added the missing bypass caps and removed the hard 90 angles. I didn’t realize reflection was a serious issue, but appreciate the advice. I really don’t mind doing a manual “final optimization” to clean up the board (that part is fun in its own way).

To Richard’s point, I would have difficultly justifying purchase of the AR at its current level of usefulness. On the upside, Eagle seems to have very fair pricing (free to hobbyist) and should I get to the point of selling a design, I would not begrudge purchasing Eagle.

reflections aren’t necessarily bad except for high speed signals. I still do 45s. It’s a habit now more than anything. Plus, I think they look more professional.

I’ve never made sense out of check grid. its unfortunate that many many parts don’t fit on any logical grid. Like db9 connectors that are almost on a 100 mil grid. when you mix different pitch packages like 100 mil, 2 mm, etc, it gets even worse.

Eagle’s grid support is one of my pet peeves. A simple “Align components” option somewhere would be useful sometimes. :slight_smile:

Ctrl-click while moving aligns the current part.

What I’d like to see is an “offset” - so I can route on a grid offset from the 0 point - handy when you need to mix mm/in spaced parts.

–David Carne

that is good if the part was defined on the current grid spacing. try mixing soics (50 mil), ssops (.65 mm) and 2mm headers for a jolly old time.

by the way the trick for getting traces to actually align with off grid pads is to always start a trace from a pad and never end a trace at a pad. meeting in the middle (at an on grid point in at least one dimension) usually makes for a good looking trace.

It would be cool if they allowed multiple grids to be active and when routing to a given pin, switch to that grid and auto-align (ie, shift the grid so the part is aligned). sort of an automatic version of your grid-offset idea.

Phil

busonerd:
Ctrl-click while moving aligns the current part.

What I’d like to see is an “offset” - so I can route on a grid offset from the 0 point - handy when you need to mix mm/in spaced parts.

–David Carne

Wow - I had not known about ctrl-click. That is going to be a huge time saver for me.

NleahciM:
Wow - I had not known about ctrl-click. That is going to be a huge time saver for me.

Turns out if you use the “command line”, by typing, say “MOVE [partname]”, this also automatically aligns the part to the grid.

to be precise, doesn’t that align the origin of the part to the grid? I’ve had to go in and modify more than a few library parts so the origin is consistant with the pins.

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VanBaston15:
LOL

Link removed because it is SPAM

AHA!!

That was a good one! :roll:

Are you still out there Vraz? If you are still trying to get Eagle to do what you want, here’s how I do exactly what you are asking for:

First route the groundplane. Turn off all the optimizers and make sure that the route direction boxes are set to (*). Set the routing grid for 5 mils, (select only the ground for routing click “select” instead of “OK” and then pick the net you wish to route in the PCB window) and go at it. You should end up with a via near most component grounds and few if any ground runs on the top side.

Make any corrections that you want, then turn the optimizers back on. If you want, you can route the power supply next by selecting it. If you want to increase the width for the power supply, do so in the DRC and then select only the power supply for routing.

Next (after making any corrections you need) set the DRC to the signal trace width and route all the rest. No need to select anything.

I get great results this way.

Good luck,

Q