great problems with arm-usb-ocd

Development Boards MicroMod
1

Hello,

I’m a university student in computer engeneering.

I’m trying to use ARM-USB-OCD for my master thesis but without any success.

My goal is to use your device to control JTAG protocol of a board with an FPGA.

First of all I had problems installing the driver. I had to look for the actual PID and VID of the device, with a usb viewer tool, then I had to modify the driver’s information files to make them fit with 0the actual values I had previously read.

Now, I’m trying to program the device with the FTDI D2XX and FTC_JTAG APIs.

I encountered the following problems:

  1. setting all GPIOs of the FTDI device to be outputs and forcing them to ‘1’, I have only two pins at ‘1’. The first is your pin 3 and the other is pin 5. Now, I expected pin 3 was connected to a GPIO of the FTDI’s device but pin 5, according to the data sheets is JTAG TDI signal. All other GPIOs (ACBUSx signals connected to your pins) are always ‘0’ and I couldn’t control them.

  2. With FTC_JTAG APIs, I set the JTAG clock frequency to the minimum (~ 91 Hz). Then I write 128 bit data into the instruction register of the controlled FPGA TAP controller with the function JTAG_Write but nothing happens on the pins of the ARM-USB-OCD. I observed every pin by an oscilloscope and the signal is always logic ‘0’.

  3. Running the command JTAG_GenerateClockPulse(#cycles) with #cycles > 1000 my PC crashes with the error DRIVER_IRQL_NOT_LESS_OR_EQUAL. FTDI’s API support values of #cycles till 2 000 000 000. The error seems to be dued to the driver, which accesses not allowed memory locations. The same error occurs if I use the function JTAG_Write(…,#bits,…) with #bits greater than 1000, and, again, the API support values till 524280.

I wonder if my device is bugged or I’m making any mistake.

Have you advice?

Thanks

2

I’d consider writing your software for linux first, the drivers there are fairly solid [open source ones], and you can look at how openocd [open source debugger software for arm] talks to the device.

OpenOCD works on windows as well, but I’ve never used it there, so I can’t speak for how it talks to the ARM-USB-OCD.

Cheers,

–David Carne

3

thanks for the answer but I already tried to take a look at OOCD and though it is open source it is ununderstandable unless you want to spend a month only for doing this.

Anyway, the driver’s is only one of the problems and, besides, not the greater one.

So, I thanks you again for the answer and I hope someone else would advice about the other problems.

Bye

4

Not sure what you’re expecting from this forum.

I doubt anyone here used FTDI’s JTAG library for an application of their own - people use the ARM-USB-OCD to debug their ARM boards using either OpenOCD or Rowley’s Crossworks, and that’s the ARM-USB-OCD’s intended purpose.

Back when I looked at FTDI’s JTAG library I found it too buggy to be useable - not sure if this changed, but judging from your problems I think it did not…

You say you want to “control JTAG protocol of a board with an FPGA.” - what exactly is it that you want to do? Do you want to use JTAG to load the FPGA configuration, or do you want to talk to a design already present in the FPGA? What manufacturer and device are you using? For example there is already support for Xilinx Virtex-2 devices in the OpenOCD, which might already work for Spartan-2, 3 and 3E, possibly with a few minor modifications.

Regards,

Dominic

5

Hello,

I apparently solved the problems setting a higher “reset pipe retry count” in the driver information files.

I said apparently, 'cause I’m still testing the software.

You say you want to “control JTAG protocol of a board with an FPGA.” - what exactly is it that you want to do? Do you want to use JTAG to load the FPGA configuration, or do you want to talk to a design already present in the FPGA? What manufacturer and device are you using?

I’ve been vague on purpose, because my tool is expected to do almost everything. I have to both to load configuration and to talk to a design. I have to do it in order to be extendable to every fpga jtag compliant.

Anyway, thanks again for the answers. I know I can rely on this forum for future problems about olimex/ftdi.

bye

6

now it SEEMS to work but i’ve got the folowing problem:

I can’t control TSRST pin. According to OLIMEX “documentation” it is pin 15 of the JTAG port and. It is connected with ACBUS1 (GPIOH1) of the FTDI device.

First of all I don’t understand the signal “TRST buffer enable”: if it is ‘0’, I can control TRST but nothing happens on TSRST (is always ‘0’). If it is ‘1’, I can’t control neither; they’re always ‘0’. On multi-ICE reference, from ARM, TSRST seems to be both input and output, so I expect I can drive it as I wish. Is it true?

Second: I don’t understand the meaning of signal connected to ADBUS5, “0 if target present”. Is this an input or an output. It seems to be an output 'cause in the port design it is not present. Is this signal meaningles for my problem?

Thank yuo again