How to handle spurious interrupts on the NXP LPC21xx family? I read the recommendations in the user’s manual (UM10139_1.pdf, specific to lpc214x) but the example code does not compile.
Here is method 1 page 63
SUB lr, lr, #4 ; Adjust LR to point to return
STMFD sp!, {…, lr} ; Get some free regs
MRS lr, SPSR ; See if we got an interrupt while
TST lr, #I_Bit ; interrupts were disabled.
LDMNEFD sp!, {…, pc}^ ; If so, just return immediately.
; The interrupt will remain pending since we haven’t
; acknowledged it and will be reissued when interrupts
; are next enabled.
; Rest of interrupt routine
Coudl anybody provide me with code ready to be used?
I had problems with that workaround because it slows down the system a lot if you have code that often disables/enables interrupts, like an RTOS, the system kept retrying to serve interrupts and in some situations stalled, I had to remove it.
The “problem 1” in that document is easily fixable by not writing the dumb code described there
The “problem 2” has several workarounds.
1 - Never disable IRQ and FIQ together as shown in that document (solution 2).
2 - Never disable FIQ, usually you don’t want FIQ sources to be delayed anyway, it is the whole point of a FIQ interrupt.
3 - Don’t use FIQ, often it is not needed at all.
Another thing to make sure is to never clear interrupt sources outside interrupt handlers, that can trigger the real spurious interrupts. This happens when the interrupt is de-asserted before the CPU fetches the handler address from the VIC. Clearing sources from inside the handlers makes sure this situation cannot happen.
