Hello, good job!!
I have a bricked fonera 2303 .
I build a xilinx dcl5 unbuffered cable lpt , like this
https://wiki.openwrt.org/doc/hardware/p … unbuffered
I have to rewrite the uboot.bin to try to revive this doorstopper .
I tryed hooking up the jtag to the lpt port, but no luck for now.
I wired the TRST to the VCC of the header directly , is it correct?
I notice that if I remove the TRST-VCC joint the jtag dont seems to be recognized.(I tryed to put a 100ohm resistor between and the result is the same).
I used a working rt3052.cfg file changing only the interface section of the interface (since the former user was using a cable usb jtag name Lattice…).
This is my openocd rt3052.cfg file:
#RT3052.cfg
set _CHIPNAME rt3052
set _ENDIAN little
set _CPUTAPID 0x1305224F
#daemon configuration
telnet_port 23
gdb_port 3333
#interface
#interface ft2232
#ft2232_device_desc "Lattice FTUSB Interface Cable A"
#ft2232_layout olimex-jtag
#ft2232_vid_pid 0x0403 0x6010
## inizio mod cavo xilinx dlc5
if { [info exists PARPORTADDR] } {
set _PARPORTADDR $PARPORTADDR
} else {
set _PARPORTADDR 0
}
interface parport
parport_port $_PARPORTADDR #originale
parport_cable dlc5
## fine mod
#jtag_speed
adapter_khz 500
#adapter_khz 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
echo on
# jtag scan chain
# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x3 -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
# format flash bank name driver base size chip_width bus_width target
flash bank $_FLASHNAME cfi 0xBF000000 8388608 2 2 $_TARGETNAME
# flash bank $_FLASHNAME cfi 0x0 8388608 2 2 $_TARGETNAME
echo "indirizzo parport "$_PARPORTADDR
echo "allocating work area"
$_TARGETNAME configure -work-area-phys 0x80040000 -work-area-size 4096
echo "allocation complete"
#Folloing code may not work, in that case you need to manually reset init
#and manually load your u-boot.bin at starting address (0x0) of flash (not RAM).
#starting Address of flash can be found in old dump of serial console or at ddwrt forum/openwrt forum
$_TARGETNAME configure -event reset-init {
#reset
echo "halting the target!!!!!!!!!!!!!!!!!!!!!!!!!!!"
halt
echo "init SDRAM controller..........................@@@@@@@@@@@@@@@@@@@@"
mww 0x10000300 0xd1825272
mww 0x10000304 0xe0120300
mww 0x1000030c 0x0511ffa1
echo "Find flash..."
flash probe 0
echo "Load u-boot to RAM.."
load_image uboot.bin 0x80000000 bin
echo "Load u-boot to FLASH .."
flash protect 0 0 10 off
flash erase_sector 0 0 10
flash write_bank 0 uboot.bin 0x0
# resume 0x80000000
}
I issued this command:
openocd -f new_rt3052.cfg -c "gdb_memory_map enable" -c "gdb_flash_program enable"
The execution stops at “allocation complete” and don’t go on , it hangs there with no errors.
I can reach the openocd telnet at the chosen port (23 in my rt3052.cfg file) but issuing a
flash probe 0
it give me an error of no flash recognized.
I m not really confident that the cable is working, how could I check it ? (some openocd commands)
Another thing, could you please share some commands for openocd flashing.
Thank you very much.