I notice the abcense of a pull up resistor on the SCL line of the I2C EEPROM on the board. At the same time I notice that P0.2 and P0.3 both are open drain.
How is SCL raised to a high level without the pull up?
/Ake
I notice the abcense of a pull up resistor on the SCL line of the I2C EEPROM on the board. At the same time I notice that P0.2 and P0.3 both are open drain.
How is SCL raised to a high level without the pull up?
/Ake