I am interfacing the TXRX24G RF module to the ATMega8
We have sent the Configuration bytes ( 15) for QBurst mode to the transmitter and receiver modules
The TX Configuration:0X00 D000 0000 0000 AABB CCDD EEA1 4704
The RX Configuration:0X00 D000 0000 0000 AABB CCDD EEA1 4705
On transmitting the addreess and data from the transmitter, the DR1 pin in the receiver is not being set high by the receiver module
There is activity on the data pin of the receiver module but this seems to be RF noise pickup
What can be the problem?
My TX code:
#include <avr\io.h>
#define CS_HIGH sbi(PORTD,PD4)
#define CS_LOW cbi(PORTD,PD4)
#define CE_HIGH sbi(PORTD,PD7)
#define CE_LOW cbi(PORTD,PD7)
#define CLK1_HIGH sbi(PORTB,PB5)
#define CLK1_LOW cbi(PORTB,PB5)
#define DATA_HIGH sbi(PORTB,PB3)
#define DATA_LOW cbi(PORTB,PB3)
void delay1();
void delay();
void shift_data(unsigned char);
void config();
int main()
{
unsigned char address, data,preamble ;
DDRB=0XFF;
PORTB=0XFF;
DDRD=0XFF;
PORTC=0XFF;
config();
while(1)
{
delay();
CS_LOW;
delay();
CE_HIGH;
delay();
address=0xAA;
shift_data(address);
delay();
address=0xBB;
shift_data(address);
delay();
address=0xCC;
shift_data(address);
delay();
address=0xDD;
shift_data(address);
delay();
address=0xEE;
shift_data(address);
delay();
data=0x31;
shift_data(data);
delay();
data=0x32;
shift_data(data);
delay();
data=0x33;
shift_data(data);
delay();
data=0x34;
shift_data(data);
delay();
data=0x34;
shift_data(data);
delay();
CE_LOW;
delay1();
preamble=0xAA;
shift_data(address);
delay();
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
}
}
void delay()
{
int i;
for (i=0;i<1000;i++)
{
}
}
void delay1()
{
int i;
for (i=0;i<4000;i++)
{
}
}
void config()
{
unsigned char conf;
CE_LOW;
delay1();
//00 2000 0000 0000 AABB CCDD EEA1 4F04
CS_HIGH; //00 E800 0000 0000 0000 0000 E723 4F04
delay();
conf=0X00;
shift_data(conf);
delay1();
conf=0XD0;
shift_data(conf);
delay1();
conf=0X00;
shift_data(conf);
delay1();
conf=0X00;
shift_data(conf);
delay1();
conf=0X00;
shift_data(conf);
delay1();
conf=0X00;
shift_data(conf);
delay1();
conf=0X00;
shift_data(conf);
delay1();
conf=0XAA; //AA
shift_data(conf);
delay1();
conf=0XBB;
shift_data(conf);
delay1();
conf=0XCC;
shift_data(conf);
delay1();
conf=0XDD;
shift_data(conf);
delay1();
conf=0XEE;
shift_data(conf);
delay1();
conf=0XA1; //
shift_data(conf);
delay1();
conf=0X47;
shift_data(conf);
delay1();
conf=0X04;
shift_data(conf);
/* conf=0X00;
shift_data(conf);*/
delay1();
CS_LOW;
delay1();
CE_HIGH;
delay1();
}
void shift_data(unsigned char data)
{
unsigned int count;
unsigned char buf;
for (count=0;count<7;count++)
{
CLK1_LOW;
delay();
buf=data & 0x80;
if (buf==0)
{
DATA_LOW;
delay();
}
else
{
DATA_HIGH;
delay();
}
data=data<<1;
CLK1_HIGH;
delay();
}
}
My RX code:
#include <avr\io.h>
#define CS_HIGH sbi(PORTD,PD4)
#define CS_LOW cbi(PORTD,PD4)
#define CE_HIGH sbi(PORTD,PD7)
#define CE_LOW cbi(PORTD,PD7)
#define CLK1_HIGH sbi(PORTB,PB5)
#define CLK1_LOW cbi(PORTB,PB5)
#define DATA_HIGH sbi(PORTB,PB3)
#define DATA_LOW cbi(PORTB,PB3)
#define DR1_HIGH sbi(PORTD,PD2)
#define DR1_LOW cbi(PORTD,PD2)
void delay1();
void delay();
void shift_data(unsigned char);
void config();
unsigned char rec_byte();
void uart_inn();
void trans(unsigned char);
int main()
{
unsigned char address, rec_data,data1,data2,data3,data4;
uart_inn();
DDRD=0XFF;
DDRB=0XFF;
config();
DDRB=0XF7;
while(1)
{
CS_LOW;
CE_HIGH;
delay1();
/* delay1();
delay1();
delay1();
delay1();
DR1_HIGH;
data1=rec_byte();
trans(data1);
delay();
data2=rec_byte();
trans(data2);
delay();
data3=rec_byte();
trans(data3);
delay();
data4=rec_byte();
trans(data4);
delay1();
delay1();*/
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
DR1_HIGH;
while(!(PIND & 0X04));
{
data1=rec_byte();
trans(data1);
delay();
data2=rec_byte();
trans(data2);
delay();
data3=rec_byte();
trans(data3);
delay();
data4=rec_byte();
trans(data4);
delay1();
CE_LOW;
delay();
}
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
delay1();
}
}
void delay()
{
int i;
for (i=0;i<1000;i++)
{
}
}
void delay1()
{
int i;
for (i=0;i<4000;i++)
{
}
}
void shift_data(unsigned char data)
{
unsigned int count;
unsigned char buf;
for (count=0;count<7;count++)
{
delay();
CLK1_HIGH;
buf=data & 0x80;
if (buf==0X00)
{
DATA_LOW;
delay();
}
else
{
DATA_HIGH;
delay();
}
data=data<<1;
delay();
CLK1_LOW;
}
}
void config()
{
unsigned char conf;
CE_LOW;
delay1();
CS_HIGH;
delay();
//OLD CONF 00 2000 0000 0000 AABB CCDD EEA1 4F05
conf=0X00; //NEW CONF 00 E800 0000 0000 0000 0000 E723 4F05
shift_data(conf);
conf=0XD0;
shift_data(conf);
conf=0X00;
shift_data(conf);
conf=0X00;
shift_data(conf);
conf=0X00;
shift_data(conf);
conf=0X00;
shift_data(conf);
conf=0X00;
shift_data(conf);
conf=0XAA; // AA
shift_data(conf);
conf=0XBB;
shift_data(conf);
conf=0XCC;
shift_data(conf);
conf=0XDD;
shift_data(conf);
conf=0XEE;
shift_data(conf);
conf=0XA1; //ADDRESS 5 BYTE & 16 bit CRC ENABLE
shift_data(conf);
conf=0X47; // 4F for Qburst mode
shift_data(conf);
conf=0X05; // CHANNEL & RX TX
shift_data(conf);
/* conf=0X00;
shift_data(conf);*/
CS_LOW;
delay1();
CE_HIGH;
delay1();
}
unsigned char rec_byte()
{
unsigned int count;
unsigned char rec_buf, data;
for (count=0;count<7;count++)
{
CLK1_LOW;
delay();
rec_buf= PINB & 0X08;
if(rec_buf ==0X08)
{
data=data | 0X01;
delay();
}
else
{
data=data | 0X00;
delay();
}
data=data<<1;
CLK1_HIGH;
delay();
}
return data;
}
void uart_inn()
{
UBRRH=0;
UBRRL=51;
UCSRB=0X18;
UCSRC=0X86;
}
/*void trans(unsigned char data)
{
while(!( UCSRA & 0X20));
UDR=data;
}
*/
void trans(unsigned char value)
{
unsigned char temp1,temp2;
temp1=value>>4;
if(temp1>=0x0A)
temp1=temp1+55;
else
temp1=temp1+48;
while(!(UCSRA & 0x20));
UDR=temp1;
temp2=(value & 0x0F);
if(temp2>=0X0A)
temp2=temp2+55;
else
temp2=temp2+48;
while(!(UCSRA&0x20));
UDR=temp2;
/*while(!(UCSRA&0x20));
UDR='\b';
while(!(UCSRA&0x20));
UDR='\b';
*/
}