Hello All.
Through my current project involving an LPC2134/01, I have experienced I/O latency, which I have not been able to find documented. Basically I am implementing an address/data-bus using fast GPIO.
The problem shows when I try this:
FIO1CLR3=(BUS_CS)>>24; // Do chip select
readVal=FIO1PIN2; // Read value
FIO1SET3=(BUS_CS)>>24; // Let go CS
readVal gets the wrong value, because it is read too early. If I add a NOP before reading the value, it works correctly:
FIO1CLR3=(BUS_CS)>>24; // Do chip select
asm("nop"); // Delay
readVal=FIO1PIN2; // Read value
FIO1SET3=(BUS_CS)>>24; // Let go CS
This is running at 10MHz CPU clock. At higher frequencies I need another NOP or two.
The external device presents a latency of 12ns from CS low to data valid (measured with a scope). At 10MHz the NOP accounts for 100ns and the I/O instruction for 200ns. It makes sense that there is a delay from the output instruction is executed until the pin changes, and from the input pin changes until the register state is updated. However, I have not been able to find this documented anywhere.
Does anyone have a pointer to the documentation (data sheet or similar) that defines the maximum delay for input and output using fast GPIO on the LPC213x/01?
Thanks in advance