I am attempting to write an init script to set the system clock/PLL, but I am loosing the JTAG connection as soon as I disconnect the PLL.
I have tried this also on the Embedded Artists LPC2468 dev board and I get the same results-- after I disconnect the PLL, I lose the JTAG connection.
I am using the latest OpenOCD with the Olimex ARM-USB-OCD interface.
Can someone explain why this is not working and/or what I am doing wrong?
Thanks!
-Joe
# LPC23xx flash command script
poll
# Shouldn't be necessary while target halted.
#mww 0xFFFFF014 0xFFFFFFFF # Disable interupts
# Check MAM config (see errata)
mdb 0xE01FC000
# What is PLLCON?
mdb 0xE01FC080
mwb 0xE01FC080 1 # Disconnect PLL
mwb 0xE01FC08C 0xAA # PLL Feed sequence
mwb 0xE01FC08C 0x55
sleep 100
mdb 0xE01FC080
poll
And this is my log file:
Debug: jtag.c:1407 jtag_init(): -
Debug: ft2232.c:1296 ft2232_init_ftd2xx(): 'ft2232' interface using FTD2XX with 'olimex-jtag' layout (0403:6010)
Debug: ft2232.c:1385 ft2232_init_ftd2xx(): current latency timer: 2
Debug: ft2232.c:1732 olimex_jtag_init(): 80 08 1b
Debug: ft2232.c:1775 olimex_jtag_init(): 82 09 0f
Debug: ft2232.c:253 ft2232_speed(): 86 0a 00
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: jtag.c:1291 jtag_examine_chain(): JTAG device found: 0x4f1f0f0f (Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: openocd.c:113 main(): jtag init complete
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST released
Debug: jtag.c:1197 jtag_reset_callback(): -
Warning: embeddedice.c:175 embeddedice_build_reg_cache(): EmbeddedICE version 7 detected, EmbeddedICE handling might be broken
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 0
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000000
Debug: arm7_9_common.c:707 arm7_9_assert_reset(): target->state: unknown
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1197 jtag_reset_callback(): -
Warning: arm7_9_common.c:734 arm7_9_assert_reset(): srst resets test logic, too
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: ft2232.c:993 olimex_jtag_reset(): trst: 1, srst: 1, high_output: 0x02, high_direction: 0x0f
Debug: ft2232.c:993 olimex_jtag_reset(): trst: 1, srst: 1, high_output: 0x02, high_direction: 0x0f
Debug: arm7_9_common.c:773 arm7_9_deassert_reset(): target->state: reset
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: SRST released
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: ft2232.c:993 olimex_jtag_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
Debug: openocd.c:117 main(): target init complete
Debug: openocd.c:121 main(): flash init complete
Debug: openocd.c:125 main(): NAND init complete
Debug: openocd.c:129 main(): pld init complete
Debug: gdb_server.c:1451 gdb_init(): gdb service for target arm7tdmi at port 3333
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: jtag.c:295 jtag_call_event_callbacks(): jtag event: TRST released
Debug: jtag.c:1197 jtag_reset_callback(): -
Debug: arm7_9_common.c:929 arm7_9_halt(): target->state: running
Debug: embeddedice.c:384 embeddedice_write_reg(): 9: 0xffffffff
Debug: embeddedice.c:384 embeddedice_write_reg(): 11: 0xffffffff
Debug: embeddedice.c:384 embeddedice_write_reg(): 12: 0x00000100
Debug: embeddedice.c:384 embeddedice_write_reg(): 13: 0x000000f7
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 4
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: arm7_9_common.c:671 arm7_9_poll(): DBGACK set, dbg_state->value: 0x19
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug: embeddedice.c:384 embeddedice_write_reg(): 12: 0x00000000
Debug: arm7_9_common.c:1039 arm7_9_debug_entry(): target entered debug from Thumb state
Debug: arm7_9_common.c:1043 arm7_9_debug_entry(): r0_thumb: 0xf0000000, pc_thumb: 0x7fffe15c
Debug: arm7_9_common.c:1079 arm7_9_debug_entry(): target entered debug state in Supervisor mode
Debug: arm7_9_common.c:1083 arm7_9_debug_entry(): thumb state, applying fixups
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r0: 0xf0000000
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r1: 0x3fffc000
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r2: 0xe0008000
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r3: 0x7fffe221
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r4: 0xe002c000
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r5: 0x7ffff9f4
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r6: 0x40000124
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r7: 0x00000000
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r8: 0x85e44568
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r9: 0xf6920627
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r10: 0x91523173
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r11: 0xdfb4247c
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r12: 0x3013097a
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r13: 0x40007fa8
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r14: 0x7fffe239
Debug: arm7_9_common.c:1108 arm7_9_debug_entry(): r15: 0x7fffe156
Debug: arm7_9_common.c:1114 arm7_9_debug_entry(): entered debug state at PC 0x7fffe156
Debug: target.c:469 target_call_event_callbacks(): target event 0
Info: target.c:232 target_init_handler(): executing reset script 'openocd_lpc2300_flash.script'
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: arm7_9_common.c:671 arm7_9_poll(): DBGACK set, dbg_state->value: 0x9
Info: configuration.c:50 configuration_output_handler(): target state: halted
Info: configuration.c:50 configuration_output_handler(): target halted in Thumb state due to debug request, current mode: Supervisor
Info: configuration.c:50 configuration_output_handler(): cpsr: 0xa00000f3 pc: 0x7fffe156
Debug: arm7_9_common.c:1779 arm7_9_read_memory(): address: 0xe01fc000, size: 0x00000001, count: 0x00000001
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Info: configuration.c:50 configuration_output_handler(): 0xe01fc000: 00
Debug: arm7_9_common.c:1779 arm7_9_read_memory(): address: 0xe01fc080, size: 0x00000001, count: 0x00000001
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Info: configuration.c:50 configuration_output_handler(): 0xe01fc080: 03
Debug: arm7_9_common.c:1925 arm7_9_write_memory(): address: 0xe01fc080, size: 0x00000001, count: 0x00000001
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000004
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug: arm7_9_common.c:1925 arm7_9_write_memory(): address: 0xe01fc08c, size: 0x00000001, count: 0x00000001
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000004
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug: arm7_9_common.c:1925 arm7_9_write_memory(): address: 0xe01fc08c, size: 0x00000001, count: 0x00000001
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000004
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Error: arm7_9_common.c:563 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: 0
Debug: embeddedice.c:384 embeddedice_write_reg(): 0: 0x00000005
Debug: arm7_9_common.c:1779 arm7_9_read_memory(): address: 0xe01fc080, size: 0x00000001, count: 0x00000001
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Error: arm7_9_common.c:563 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: 0
Info: configuration.c:50 configuration_output_handler(): 0xe01fc080: 00
Debug: embeddedice.c:220 embeddedice_read_reg_w_check(): 1
Info: configuration.c:50 configuration_output_handler(): target state: running
And here is my .cfg:
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout "olimex-jtag"
#ft2232_vid_pid 0x15BA 0x0003
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
# Dominic recommends jtag speed 9 for LPC23xx with slow (4MHz) startup speed. (higher=slower)
jtag_speed 10
jtag_nsrst_delay 500
jtag_ntrst_delay 500
# Target configuration ("reset" target or merely "attach" when started)
# Must be reset to run script
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
run_and_halt_time 0 100
working_area 0 0x40000000 0x40000 nobackup
# Script to run?
target_script 0 reset openocd_lpc2300_flash.script
# Flash configuration
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 12000 calc_checksum
#flash bank lpc2000 0x0 0x80000 0 0 0 lpc2000_v2 12000 calc_checksum #full use of 512K flash???