I have recently been playing with a project that is requing more and more uarts to connect rs232 devices.
My ARM9 system (TS-7800) only has 3 uarts. I am hoping to add more uarts via an fpga but I am not sure about a few things.
What is the interface between the uart and arm?
How many uarts can I add with an fpga? could i have 8 uarts on a fpga? and what would the bus between the arm and the fpga look like?
Are there any other solutions other than using an fpga that would get me lots of uarts? the reason I want to try the fpga is because there is already one onboard.
Also maybe this is a seperate question, but how do I make it selectable between rs232/rs422/rs485? My only experience is with RS232, but as some of the devices I am looking require an RS422/485 interface I am curious how I could utilize a switch on my system.
I have been looking at some implementations on FPGA’s. The problem is all the examples only show one uart. So I’m not sure how I could connect 5-6-7 or 8 uarts and have enough bandwidth from the micro to the fpga.
Just not that familiar with it.
And I’m still lost on what RS422 485 is and if u can implement it with a uart or if it takes more than just that.
RS422/485 is very similar to RS232 from a protocol standpoint, but the physical interface is significantly different. RS232 has a maximum theoretical useful distance of 50’, RS422/485 can go up to 1500’ I believe. That requires different levels on the lines and a different conversion chip. The only real difference between 232/422/485 is the TTL converter chip.
If your serial devices are addressable, then you might want to look into 422/485, since they also support multi-drop (more than one device on the same line). They also require a termination resistor at the end of the device loop.
An octal uart is somewhere between $17 and $19. Quads are in the $10 range. For my project, I’ve gone with just using more lpc2103’s. AT ~$2.50 each, they give me two uarts, and they have enough memory and speed to do data pre-processing, and then use SPI to pass the data to the main processor, in this case a lpc2378.
Hmm I have read about using a FPGA to create these interfaces. An moderate spartan 3e costing about 10 bucks should be able to do more than a couple (at least 6 or 8) I would think, if not even 10.
The problem with the FPGA approach is I am not sure how to address the different ports from the uC.
Ideas or suggestions on busses between the fpga and arm would be appreciated.
The interface between your uC and the FPGA-based UARTs would be ENTIRELY defined by you. Use Morse code, if you want.
More seriously, it could be another UART, running at a much higher baud rate than the externally-connected ones. To make any meaningful decisions here, you’re going to have to quantify the amount of data that would be going in and out of these ports at the same time.
PS: 6, 8 or even 10 UARTs on a FPGA would be a serious underachievement. There are parts out there that could trivially do a thousand.
Thanks for the heads up jason. I started out a few years back with a goal to learn a bunch of micro controllers and have been building serial to ethernet bridges with various chips. I’ve recently moved to an ARM9 based dev system and am developing this same application again as an educational exercise and to develop something I wish to use. From what I have found out, it seems like my best bet is to learn how to interface an FPGA to the ARM9 to do my job.
Up till now I have been dealing with RS232 only, but as I see that an RS422/485 bus can be useful, I have added them to my spec, however it seems as though this does not matter as long as I have sufficient UARTS for each of the connection types.
Let me share my specs with you to see if it sounds reasonable.
My goals is to have my ARM9 system with 10 UARTS. 8 dedicated for RS-232 and one each for RS422 and RS485.
Using a FPGA to implement the UARTS, I would need to have 8 x 1Mbps plus 2x 10Mbps bandwidth to support the 10 I/Os. (28Mbps + overhead).
I have followed several tutorials on setting up a UART system for an FPGA based on the old 16550s but the examples all define a single UART on the fpga, and tie up pins that interface with the ARM.
With this approach I would need to have seperate I/O pins dedicated to all of the individual UARTS. I would think that I could simply this but I am not sure.
I guess what I am stuck on is what protocol to use between the ARM and the FPGA to have sufficient bandwidth. Obviously I have my bandwidth requirements. Beyond that I am looking for something that is easy to implement/drive from an ARM9 based linux system.
Once I have a UART, I can put the appropriate driver to make it an RS232/422/485. Or perhaps even configurable at run time.
Just looking for some advise as I try to learn all this.
Can you afford having at least 18 pins connected between the ARM and FPGA? A parallel bus with 8 data bits and 8 address bits, plus read and write signals, would be a fairly simple way to get a lot of bandwidth.
The address bits would be:
4 bits to select a UART.
4 bits to select a register within that UART (I’m assuming that the 16550 has no more than 16 registers, I’ve never used one directly).
The data bus and register address bits would be connected in parallel to all ten instances of the 16550. The UART select bits would be decoded to produce enable signals for each 16550.
If you can’t spare that many pins, then SPI would reduce the count to 3 (I’m assuming your ARM has a SPI peripheral). You may not be able to get quite the speed you’re asking for, but then I think your bandwidth figures are a bit optimistic (1 Mbps RS-232 is only reliable over a maximum cable length of, roughly, negative 1 foot).
Or, going the other way, you could connect the FPGA to the full address/data bus of your ARM (assuming that it’s not a microcontroller-like device that only supports internal memory), and make it appear as if you actually had ten 16550 chips in your address space.