I am trying to port OpenOCD to an eCos powered board that also contains a FPGA for general purpose I/O.
The first approach was to have the JTAG pins directly mapped as I/O, which turns out to be very slow (JTAG TCK running at aprox 10 KHz).
The next step is to move some parts to FPGA. I have the TAP controller and the ICE access moved to the FPGA now, and I am trying to integrate that into OpenOCD.
My questions are:
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What’s the best approach to implement this in OpenOCD?
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Do I need direct access to TAP, or access to ICE is enough?
Regards,
Edgar