need help with IT block (ARM assembly)

Hi all,

I am very new to this assembly language. Currently i am working on small project using LPCXpresso baseboard using LCPXpresso software. I have a bit back ground of c programming. I have difficulties getting my syntex right in assembly.

My logic in c is as below. I am trying to get equivalent syntex in assembly. Kindly direct me with simple example. I have read about IT block in arm assembly, but have difficulties getting IT right.


//case 1

if (R0 = 0 && abc < 3) ;note:abc is a varible

{

…;do something

}


//case 2

if (R0 = 0 && abc < 3)

{

goto label;

}

label:


Thanks all your help in advance.

Hi lpc1769 (nice nick btw),

Your question might be

  1. how can I implement this logic in assembly?, or

  2. Give me a good example of an IT block

In my (very inexpert) opinion, regular conditional branches are better for this situation than IT blocks. It sounds like the variable abc must be fetched from ram for comparison. If you use regular conditional branches and the r0 clause fails, you can skip fetching abc from ram. If you try to “phrase the clause” as an IT block, I think it only makes your code more complicated.

I’m sure I don’t grasp the subtleties of IT block usage, but it seems to me they’re no advantage unless you make use of both (then) and else. And even then, only if you can accomplish your goal in the 3 or 4 alloted lines of assembly.

In this simplified example, it isn’t easy to do much better than un-optimized gcc. Example ifthen.c

int abc;

itexample(int y) {
	register int x = y;
	if ((x == 0) && (abc < 3)){
		x += 32;
		x -= 24;
		x -= 8;
	}
	x *= 2;
	if ((x == 0) && (abc < 3)) goto theend;
	x += 64;
	x += 4;
	return 1;
	theend:
	x = 127;
	return 0;
}

Compile with```
arm-none-eabi-gcc -mthumb -mcpu=cortex-m3 -o ifthen.s -S ifthen.c

resulting ifthen.s:

Note that the I let the compiler pick the register (r4) rather than trying to force it to use r0. The action starts around line 30 with *cmp r4, #0*

.syntax unified
.cpu cortex-m3
.fpu softvfp
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 1
.eabi_attribute 30, 6
.eabi_attribute 34, 1
.eabi_attribute 18, 4
.thumb
.file	"ifthen.c"
.comm	abc,4,4
.text
.align	2
.global	itexample
.thumb
.thumb_func
.type	itexample, %function

itexample:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
push {r4, r7}
sub sp, sp, #8
add r7, sp, #0
str r0, [r7, #4]
ldr r4, [r7, #4]
cmp r4, #0
bne .L2
movw r3, #:lower16:abc
movt r3, #:upper16:abc
ldr r3, [r3, #0]
cmp r3, #2
bgt .L2
add r4, r4, #32
sub r4, r4, #24
sub r4, r4, #8
.L2:
lsl r4, r4, #1
cmp r4, #0
bne .L3
movw r3, #:lower16:abc
movt r3, #:upper16:abc
ldr r3, [r3, #0]
cmp r3, #2
ble .L7
.L3:
add r4, r4, #64
add r4, r4, #4
mov r3, #1
b .L5
.L7:
nop
.L6:
.L4:
mov r4, #127
mov r3, #0
.L5:
mov r0, r3
add r7, r7, #8
mov sp, r7
pop {r4, r7}
bx lr
.size itexample, .-itexample
.ident “GCC: (Sourcery CodeBench Lite 2011.09-69) 4.6.1”

Is this a homework exercise by any chance? It certainly looks like it.

if (R0 == 0 && abc < 3) 
{
 ... 
}

Is equivalent to:

if (R0 == 0)
{
   if (abc < 3)   
   {
      ...
   }
}

You can’t nest IT blocks so the best you could do is possibly code the inner if statement as an IT block - as long as it is small enough.

Before spending any more time on this sort of exercise I recommend that you purchase a copy of “The Definitive Guide to the ARM Cortex-M3” by Joseph Yiu and study it well.