It tells you in Appendix B of the new datasheet for the 24L01 the settings necessary to communicate between 24L01 and 2401 devices. You should probably give that a read.
As you can see, this value does have zeroes in bit positions [7:5]. Bits are ordered with the highest number as the most significant position (i.e., the left-most bit).
I think my nRF24L01 is transmitting fine.(not sure)
but i can’t get the nRF2401 to recieve anything.
I followed the configuration on the datasheet and still nothing.
i currently have them both work with 3 byte Address, same channel, same datarate, same CRC.(16 bit)
And my cercuit is pretty simple (no way it’s wrong)
I am doing this on a PIC16F88 and i can see on the oscilloscope that the signals are going to the nRF24L01 but i don’t get anything on nRF2401 (it works file- it’s the development kit from Sparkfun)
What could be wrong here guys ? I mean i even had the antennas of both of them almost touching each other so it’s not a matter of antenna configuration.
In all my thinkig and debugging i forgot to check the simplest thing.
The XTAL (16Mhz) was reversed. I always had this problem. You see the text on the Crystal and you think that that’s the same Pin Schema as the IC’s. I always had to check the datasheet for this tiny thing to get it right
Sorry guys for bothering you with my stupid questions.
I have followed the Sample code a couple of times and i have found that the transmitter part is transmitting. I just can’t get the thing to REcieve.
I am now testing two the same chips nRF24L01.
I have debugged the problem on the IRQ_DR.
It seems to stay HIGH no matter what i do.
if i just keave the transmitting code then everything is OK.
But when i put in the reciever code the IRQ_DR stays HIGH, i tried flushing the int, resetting the chip, nothing.
so just to make sure.
When CE is low and i pulse it (for 10ms) then the data that i have ported into the FIFO transmits.
Now on the reciever end i have to set CE high ONLY for 200ms so that the chip has time to recieve the data and set the IRQ high and then i set it back to LOW again and clock out the data.
Is this correct ?
so the reason for IRQ staying high could be that i don’t clear the FIFO after i read the data ? or because i have CE high i can’t clear the FIFO and reset the INT sonce resetting the INT could only be done in Standby (CE low) ?
i know this is propably all on the datasheet, it’s just that i don’t see it.
Please help out here.
What is the Sequence of setting CE low and high to have everything working ?
At the receiver, you should leave CE high all the time (unless you’re doing some sort of power management scheme). You would only bring CE low once you’ve received a packet and your reading it into your micro. Then you would set CE high again once you read out the packet. If you don’t do it this way, you are likely to miss a lot of packets because the 24L01 can only receive packets when CE is high.