OK, I changed to a 2 byte CRC and removed any time delays from the TX side (according to the datasheet this should be possible). Now I receive a steady stream of data (the O’s represent a valid packet). That makes me very happy!!!
But still sometimes it craps out and stops recieving. Here’s a printout:
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO // STEADY STREAM OF VALID PACKETS
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 4F 4F 4F 4F 70 78 00 00 00 00 00 00 00 00 00 OOOOOpx......... // 5 good packets and then some crap (px..................)
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00 60 6B 66 62 63 64 65 63 67 68 69 6A 6B 6C 6D .`kfbcdecghijklm // second invalid packet (somehow this does get through the CRC filter...)
03 00 00 00 00 00 00 00 00 00 00 00 00 4F 4F 4F .............OOO // Some valid packets again
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 70 78 00 01 00 00 00 07 00 01 0F 01 03 0F 0F Opx............. // some crap
0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 0F 4F 4F 4F .............OOO // valid
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 78 78 00 00 00 00 00 00 00 00 00 00 00 00 00 Oxx............. // crap
00 00 00 00 00 00 00 00 00 00 00 00 00 78 78 00 .............xx.
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00 00 00 05 06 77 00 79 7A 4F 4F 4F 4F 4F 4F 4F .....w.yzOOOOOOO // valid
4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F 4F OOOOOOOOOOOOOOOO
4F 4F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F OO _ _ _ _ _ _ _ // receiver doesn't receive anyting anymore from this point on
20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F _ _ _ _ _ _ _ _
20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F _ _ _ _ _ _ _ _
20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F _ _ _ _ _ _ _ _
20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F _ _ _ _ _ _ _ _
20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F 20 5F _ _ _ _ _ _ _ _
Does this make any sense to you with you experience?
So there could also be something wrong on the TX side perhaps?
The TX runs this code:
bool sendAck (bool ok, unsigned int maxSendingTime, bool setAsTX)
{
unsigned char okData[28] = { 'o', 'k', 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z' };
unsigned char falseData[28] = { 'n', 'o', 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', 'y', 'z' };
nrf24l01_clear_flush(); //clear interrupts and flush
if (setAsTX)
{
nrf24l01_rx_active_to_standby();
DelayUS(130);
nrf24l01_set_as_tx(); //change the device to an TX
}
WriteTimer0(0); // reset timer
if (!ok)
{
nrf24l01_write_tx_payload(falseData, 28, true);
}
else
{
nrf24l01_write_tx_payload(okData, 28, true);
}
while( !(nrf24l01_irq_pin_active() && (nrf24l01_irq_tx_ds_active() || nrf24l01_irq_max_rt_active()) ) && ReadTimer0() < maxSendingTime );
DelayUS(10); // Delay to be sure STATUS info is up to date
if (nrf24l01_irq_tx_ds_active())
{
//////nrf24l01_irq_clear_all(); //clear interrupts
//////DelayUS(130); // avoid timing issues??
return true; // transmit succeeded and was recieved
}
else
{
//////nrf24l01_irq_clear_all(); //clear interrupts
//////DelayUS(130); // avoid timing issues??
return false; // unsuccessful transmit
}
}