OpenOCD + IAR(SEGGER) J-Link JTAG + STR912-SK

Hi All,

I’m having some issues trying to get the above combo to ‘play’ nice.

I’ve installed OpenOCD and am able to communicate with the j-link, but am having difficulty configuring the board.

(Running OpenOCD on i386 Linux 2.6.23.17-88.fc7)

Here is the output of a session:

$ ./openocd -f openocd.cfg 
Open On-Chip Debugger 0.1.0 (2009-05-17-16:10) Release


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: https://kc8apf@svn.berlios.de/svnroot/repos/openocd/tags/openocd-0.1.0/src/openocd.c $
RCLK - adaptive
Info : J-Link ARM V7 compiled Feb 17 2009 16:45:24
Info : Vref = 3.293 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 1 TRST = 1

Info : J-Link JTAG Interface ready
Info : JTAG tap: str912.flash tap/device found: 0x04570041 (Manufacturer: 0x020, Part: 0x4570, Version: 0x0)
Info : JTAG Tap/device matched
Info : JTAG tap: str912.cpu tap/device found: 0x25966041 (Manufacturer: 0x020, Part: 0x5966, Version: 0x2)
Info : JTAG Tap/device matched
Info : JTAG tap: str912.bs tap/device found: 0x2457f041 (Manufacturer: 0x020, Part: 0x457f, Version: 0x2)
Error: JTAG tap: str912.bs             got: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
Error: JTAG tap: str912.bs expected 1 of 1: 0x1457f041 (mfg: 0x020, part: 0x457f, ver: 0x1)
Error: trying to validate configured JTAG chain anyway...
Warn : no tcl port specified, using default port 6666
Info : accepting 'telnet' connection from 0
Error: Translation from jtag_speed to khz not implemented
Error: Translation from jtag_speed to khz not implemented
Runtime error, file "embedded:startup.tcl", line 143:
    Info : JTAG tap: str912.flash tap/device found: 0x04570041 (Manufacturer: 0x020, Part: 0x4570, Version: 0x0)
Info : JTAG Tap/device matched
Info : JTAG tap: str912.cpu tap/device found: 0x25966041 (Manufacturer: 0x020, Part: 0x5966, Version: 0x2)
Info : JTAG Tap/device matched
Info : JTAG tap: str912.bs tap/device found: 0x2457f041 (Manufacturer: 0x020, Part: 0x457f, Version: 0x2)
Error: JTAG tap: str912.bs             got: 0x2457f041 (mfg: 0x020, part: 0x457f, ver: 0x2)
Error: JTAG tap: str912.bs expected 1 of 1: 0x1457f041 (mfg: 0x020, part: 0x457f, ver: 0x1)
Error: trying to validate configured JTAG chain anyway...
Error: usb_bulk_read failed (requested=329, result=256)
Error: jlink_tap_execute, wrong result -1, expected 329
Error: usb_bulk_write failed (requested=712, result=-110)
Error: jlink_tap_execute, wrong result -1, expected 354
Error: usb_bulk_write failed (requested=740, result=-110)
Error: jlink_tap_execute, wrong result -1, expected 368
Error: usb_bulk_write failed (requested=768, result=-110)
Error: jlink_tap_execute, wrong result -1, expected 382
Error: usb_bulk_write failed (requested=796, result=-110)
Error: jlink_tap_execute, wrong result -1, expected 396
Error: usb_bulk_write failed (requested=824, result=-110)
Error: jlink_tap_execute, wrong result -1, expected 410
Error: usb_bulk_write failed (requested=852, result=-110)

I telnet into OpenOCD server, I issue the ‘reset halt’ command (as suggested by last post of [this thread) and then the ‘Error: usb_bulk_write failed’ lines start. To me, it looks like the board is not ‘configured’ properly before I try to do anything with it.

My openocd.cfg file is as follows:

#daemon configuration
telnet_port 4444
#tcl_port 6666
gdb_port 3333

# GDB can also flash my flash!
gdb_memory_map enable
gdb_flash_program enable

#interface
source [find interface/jlink.cfg]

#board (target is sourced from inside)
source [find board/iar_str912_sk.cfg]

As you can see, I’m using the default config found with the openocd distribution (contents of target/str912.cfg, below)

# script for str9

if { [info exists CHIPNAME] } {	
   set  _CHIPNAME $CHIPNAME    
} else {	 
   set  _CHIPNAME str912
}

if { [info exists ENDIAN] } {	
   set  _ENDIAN $ENDIAN    
} else {	 
   set  _ENDIAN little
}

# jtag speed. We need to stick to 16kHz until we've finished reset.
jtag_rclk 16

jtag_nsrst_delay 100
jtag_ntrst_delay 100

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst

if { [info exists FLASHTAPID ] } {
   set _FLASHTAPID $FLASHTAPID
} else {
   set _FLASHTAPID 0x04570041
}
jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x25966041
}
jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID


if { [info exists BSTAPID ] } {
   set _BSTAPID $BSTAPID
} else {
   set _BSTAPID 0x1457f041
}
jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e

$_TARGETNAME configure -event reset-start { jtag_rclk 16 }

$_TARGETNAME configure -event reset-init {
	# We can increase speed now that we know the target is halted.
	#jtag_rclk 3000
	
	# -- Enable 96K RAM
	# PFQBC enabled / DTCM & AHB wait-states disabled
	mww 0x5C002034 0x0191 

	str9x flash_config 0 4 2 0 0x80000
	flash protect 0 0 7 off
}

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0

#flash bank str9x <base> <size> 0 0 <target#> <variant>
flash bank str9x 0x00000000 0x00080000 0 0 0
flash bank str9x 0x00080000 0x00008000 0 0 0

# For more information about the configuration files, take a look at:
# openocd.texi

I am completely new to the embedded ‘world’ and would truly appreciate any/all pointers. I tried to read up on this topic as much as possible, but at this point am unable to find directions on how to move forward. Hopefully someone has a similar setup as I do and has successfully used this board.

Thank you!

Pete](Openocd + Amontec JtagKey + STR9 - SparkFun Electronics Forum)

The jlink support in openocd is still as such work in progress (wip).

There has been a lot of changes to the code over the last few weeks, most of the tests however have been with v3/4/5/6 jlinks - not with a v7 that you have.

Are you able to build openocd yourself?

Cheers

Spen

Yes, I’m able to build openocd.

I got a similar reply from another forum I posted on, which prompted me to scan through the openocd-devel list (drawing the same conclusion you’ve posted).

I’ll get the latest version from svn and try again.

I also got the amontec jtagkey tiny from sparkfun as it’s fully supported by openocd (in case fighting jlink ends up taking too much of my time).

Thanks!

P