Re: Tech question for ARM and LPC

Development Boards MicroMod
1

Hello,

I am moving from 8051 to ARM, and using LPC-2294 board, I have some questions regarding the knowledge of ARM LPC-2294,

(1) Extra 32 bytes for interrupt vector

The user manual of LPC-2294 says, “the portion of memory that is re-mapped to allow interrupt processing in different modes includes the interrupt vector area(32 bytes) and additional 32 bytes, for a total of 64 bytes.”

Why is that 32 bytes for ?

(2) Speed

My board is Olimex LPC-E2294 with 14.745 Mhz crystal frequency, How do I estimate the execution speed, Simply speaking, how long does it take to execute one instruction with 14.745 MHz crystal ? Does ARM instruction has different machine cycle ? I mean for some instruction it may take 24 pulse, other may take 36 pulse (like 8051, each machine comprise 12 pulse).

(3) Memory re-mapping

I am confussed by four types of memory mapping mode.

Boot loader mode - the boot loader always executes after any reset. the Boot Block interrupt vectors are mapped to the bottom of memory to allow handling exceptions and using interrupts during the Boot Loading Processing.

Question 1. What does “the Boot Block interrupt vectors” mean ? Is there two different interrupt vector ?

Question 2. What does "Are mapped to the bottom of memory"mean ? my understand is the address 0x7FFFC000+0x14 has been copied to 0x14, (0x7FFFC000 is the boot block start address) Am I right ?

User Flash mode - Activated by Boot Loader when a valid User Program Signature is recognized in memory and Boot Loader operation is not forced …

Question 1. What does “Activated by Boot Loader” and “Boot Loader operation is not forced” mean ? Whether Boot loader is executed or not ?

User RAM mode - Activated by a User Program as designed, interrupt vectors are re-mapped to the bottom of the Static RAM

Question 1. What does “re-mapped” mean ?

Thanks in advance

Daniel

2

(1)

Exceptions are entered in ARM mode where every instruction is 32bit. With 32bit opcode + operand you can’t specify an arbitrary address in the whole address space. The additional 32byte allow you specify absolute addresses.

(2)

The LPCs have an on-chip PLL that generates up to about 60MHz out of the 14.745MHz crystal. Most data processing instructions take one cycle, memory loads take three cycles and memory stores take two cycles. Branches suffer a penalty because of the pipelined architecture (3 stages) The ARM7TDMI-S rev4. TRM (available at arm.com) has a list of instruction cycle timing for every instruction.

(3)

The “Boot Block interrupt vectors” are the first 64 byte from the “boot block” - a part of the on-chip flash that’s used to store the bootloader and IAP/ISP routines. The first ARM exception is by default at 0x0 (unless you’re using highvecs, available on some cores). The remapping makes the boot block interrupt vectors appear at address 0x0, in addition to their original address.

User flash mode means that once the bootloader ran, control is transfered to your code located in the internal flash. You can force to enter ISP (in system programming) operation by holding some pin low/high (see the data sheet). In that case, control isn’t transfered to user flash.

In RAM mode 64 byte from internal SRAM appear at address 0x0 in adition to their original location. This allows you to modify the interrupt vector table during runtime.

Regards,

Dominic

3

good place to start learning LPC (beside the Philips datasheets and user manuals) http://www.hitex.co.uk/arm/lpc2000book/ … dpage.html

Best regards

Tsvetan