I am hoping someone can point out the error of ways here. I trying to used OpenOCD with a RLink-Pro on a STR912F target. Whenever I try to do a “flash erase_check 0” I always get an error and OpenOCD terminates like this:
Error: rlink.c, 543: too many retries waiting for DTC status
Error: dtc_run_download: No Error
I have tried under Windows7 and Ubuntu (Natty) using openocd-0.4.0 both produce the same error.
I’ve also tried two different boards: one is a custom design board, the other is an OLIMEX STR-E912.
I’ve also tried the latest in 0.5.0 in the git repository.
I’ve also tried the increasing the number of retries, as suggest in an email I found.
All produce the same error. The only difference is that the str912.bs is Version 2 on the custom board and Version 1 on the Olimex board.
I noticed recently there were some patches (7 of them) posted with fixes and performance improvements for rlink.c. I tried those with the latest git code and it generate lots of messages about more, or less data than expected and I was unable to even halt the target device.
I’m trying to get an Eclipse development environment for FreeRTOS running for our STR912F based board.
I’d also like to know how I can select the boot flash, using OpenOCD, so I can switch between our bootloader and application code.
Here is the full log:
–
openocd -f interface/rlink.cfg -f target/str912.cfg -f openocd.cfg Open On-Chip Debugger 0.4.0 (2011-07-29-10:29) Licensed under GNU GPL v2 For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
RCLK - adaptive
jtag_nsrst_delay: 100
jtag_ntrst_delay: 100
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain Warn : str912.flash: nonstandard IR mask Warn : str912.bs: nonstandard IR mask
Error: RCLK not supported
Warn : The lowest supported JTAG speed is 375 KHz
Error: RCLK not supported
Warn : The lowest supported JTAG speed is 375 KHz Info : RCLK (adaptive clock speed) not supported - fallback to 375 kHz Info : JTAG tap: str912.flash tap/device found: 0x04570041 (mfg: 0x020, part:
0x4570, ver: 0x0)
Info : JTAG tap: str912.cpu tap/device found: 0x25966041 (mfg: 0x020, part:
0x5966, ver: 0x2)
Info : JTAG tap: str912.bs tap/device found: 0x1457f041 (mfg: 0x020, part:
0x457f, ver: 0x1)
Info : Embedded ICE version 6
Info : str912.cpu: hardware has 2 breakpoint/watchpoint units
375 kHz
verify Capture-IR is disabled
requesting target halt and executing a soft reset target state: halted target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
background polling: on
TAP: str912.cpu (enabled)
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
fast memory access is enabled
cleared protection for sectors 0 through 7 on flash bank 0 successfully checked protect state
#0 : str9x at 0x00000000, size 0x00080000, buswidth 0, chipwidth 0
0: 0x00000000 (0x10000 64kB) not protected
1: 0x00010000 (0x10000 64kB) not protected
2: 0x00020000 (0x10000 64kB) not protected
3: 0x00030000 (0x10000 64kB) not protected
4: 0x00040000 (0x10000 64kB) not protected
5: 0x00050000 (0x10000 64kB) not protected
6: 0x00060000 (0x10000 64kB) not protected
7: 0x00070000 (0x10000 64kB) not protected str9x flash driver info erased sectors 0 through 7 on flash bank 0 in 8.983916s
Error: rlink.c, 543: too many retries waiting for DTC status
Error: dtc_run_download: No error
–
And here is my config file that I used (openocd.cfg)
–
default ports
telnet_port 4444
gdb_port 3333
tcl_port 6666
init
jtag_khz 1125
verify_ircapture disable
soft_reset_halt
halt
#wait halt
poll
str9x flash_config 0 4 2 0 0x80000
arm7_9 fast_memory_access enable
flash protect 0 0 7 off
flash protect_check 0
flash info 0
flash erase_sector 0 0 7
flash erase_check 0
shutdown
–
cheers,
Andrew.