Soft SPI faster than SSP Port on LPC2138

Development Boards MicroMod
1

Hello, I’m interfacing a LPC2138 with the Nokia 6100 LCD (Philips controller - brown connector).

I have implemented in the lowest level API of the code, the possibility between using either “Soft SPI” (over the SSP port pins, but as GPIO) or “Hard SPI” (the SSP configured as 9bits, SPI, Master…) But I have figured out that there is something strange with the SSP port, and it’s not as fast as the soft spi port.

The configuration of the MCU is this one, and doesn’t change when I use soft or hard SPI.

       //10MHz Crystal

	// Setting Multiplier and Divider values
	// PLLCFG (0-4) = M-1 = 5 = 0b00101
	// PLLCFG (5-6) = P = Fcco / (2xCclk) = 2

       Is this the FASTEST config for 10Mhz crystal?  

  	PLLCFG=0x25;
  	feed();

	// Enabling the PLL */
	PLLCON=0x1;
	feed();

	// Wait for the PLL to lock to set frequency
	while(!(PLLSTAT & PLOCK)) ;

	// Connect the PLL as the clock source
	PLLCON=0x3;
	feed();

	// Enabling MAM and setting number of clocks used for Flash memory fetch (4 cclks in this case)
	MAMCR=0x2;
	MAMTIM=0x3;
	
	// Setting peripheral Clock (pclk) to System Clock (cclk)
	VPBDIV=0x1;

and here it’s the SSP configuration rutine

//init SPI Bus for LCD - 9bits - HiFreq - SPI1 Interfase
void System_SPI1Init() {
	#ifdef USE_HARD_SPI_FOR_LCD
		// PCLK = 60MHz?	
		IODIR0 |= (LCD_MOSI | LCD_SCK | LCD_CS | LCD_RESET);
		
		// reset Pin-Functions	
		SSP_PINSEL &= ~( (3<<SSP_SCK_FUNCBIT) | (3<<SSP_MISO_FUNCBIT) |
			(3<<SSP_MOSI_FUNCBIT) | (3<<SSP_SS_FUNCBIT) );
				
		// set Pin Functions
		SSP_PINSEL |= ((2<<SSP_SCK_FUNCBIT)  | (0<<SSP_MISO_FUNCBIT) |
					   (2<<SSP_MOSI_FUNCBIT) | (0<<SSP_SS_FUNCBIT));
		
		SSPCR1 = 0; //disable
						
		// CPOL = 0 CPHA = 0 9bits SPI
		SSPCR0 = ((SSP_DATABITS-1)<<0) | (0<<SSP_CPOL) | (16<<SSP_SCR); 
		
		SSPCR1 |= (1<<SSP_SSE);
		
		SSPCPSR = 32;
		
		IOSET0 = LCD_CS;
		IOCLR0 = LCD_RESET;
							
	#else
                // software SPI implemented using GPIO bit manipulation
		IODIR0 |= (LCD_MOSI | LCD_SCK | LCD_CS | LCD_RESET);
		IOCLR0 = LCD_SCK;
		IOCLR0 = LCD_MOSI;
		IOSET0 = LCD_CS;
		IOCLR0 = LCD_RESET;
	#endif
}

With SSP_SCR = 16 and SSPCPSR = 32, the LCD works great, but the hardware port is between 3 and 4 times SLOWER than the Soft implementation (Software implementation using IO Pin maniputaion).

If I set SSP_SCR = 8 and SSPCPSR = 16 for example, or decrease only one of that values, the LCD starts working improperly (garbage on the screen or doesn’t paint well)

My LPC2138 chip says:

LPC2138FBD64

S60537.23 03

ZPG0451-Y

Thanks!

Ezequiel[/code]

2

When you use the legacy IO ports of the LPC2138, the ports do not reflect the intended state right away, some cycles are lost in between.

I think that when you lower the SPI divider you get the actual speed increase and you start loosing bits here and there.

You could verify this using a scope.

3

I also think that it’s losing bits when I increase the hardware Spi port speed.

But I’m sure that hard SPI is faster than software, so there is a configuration for the hardware interfase where the soft implementation and the hardware one run at the same speed (when the spi speed matchs the legacy io bitbang speed)

I cannot even get that point, the spi bus starts to send ‘garbage’ to the LCD before archiving that speed.

Is there in my spi configuration wrong?

May be I misundertood how the register that sets the speed of the bus work.

Thanks for replying.

Ezequiel