SPI mater transmit problem

Hi,

I am using ST micro STR911FAW44X6 as SPI master to send out a hugh amount of data(136*256 bytes) to a SPI slave. I set up CLK as 10MHz, CPHA=0, CPOL=0.

The way I send out the data is as follows:

for ( j = 0; j < 100; j++)

{

for(i=0;i<256;i++)

{

SSP1->DR = i;

while( ( SSP1->SR & 0x0001) == 0x0000 ); // wait transmit FIFO to be empty

}

}

It is supposed to send out data from 0x00 to 0xFF for 100 rounds. At beginning the slave receives the correct data. Then at about round 20, the data SPI slave received seems to be missing the last bit. For instance, the received data is supposed to be 0xFC, 0xFD, 0xFE, 0xFF; but the actual data received is 0xFC, 0x7E, 0xFF, 0x7F. Seems that the receive shift register did not received the last bit when 0xFD is sent out. It received 0x7E(meaning only 7bits are shifted in). It shifted the most significant 7bits of 0xFD, then all subsequent bytes are messed up. Do you know how I can fix it from the MCU transmit side given that the slave code is fixed? I tried to put delay after while loop but did not work.

It sounds like you are getting glitches in the receiver. To narrow down what might be the problem I would recommend:

  1. Check all polarities (CPHA and CPOL) carefully and ensure they match what the receiver expects.

  2. Reduce the clock rate and confirm that the system works reliably at a lower rate - ie that the problem is caused by timing issues and not something else. See if you can find the frequency at which the errors begin to appear.

  3. Take a look at the signals with a scope and make sure they look clean and sharp. If they are rounded a bit (due to EMC control measures) then ensure that at the various trigger levels the setup and hold times for the slave are within limits.

Without any further information I can’t really speculate as to what else the problem might be. 10MHz is getting up there though, so you should definitely check the timing specs on the slave datasheet and see what the signals look like. If you are out of spec, then you’ll likely have to either slow the data rate or look at a hardware solution.