SPI nRF24L01 & 18F8723

Wireless & IoT
1

Hello,

I’m working with the Nordic nRF24L01(3,3V) and a 18F8723(5V), i’m trying to read some registers, but the only thing that comes out of the nRF24L01 chip is the Status register (0x0E) every thing else is 0x00.

SSP2CON1=0b00100001;

SSP2STAT=0;

CLK 13.5 MHz.

What did I forget, or is the chip just defect ?

2

I have a bunch of tutorials for getting the 24L01 to work with PIC18F parts (with C18). Check out my website in my signature.

3

I’ve given him some very simple test code of mine (he posted the same msg on the Microchip forum), but he seems to want something else. I think he might have a hardware problem.

Leon

4

yes leon (also posted @micrchip forum) the software isn’t the problem.

Well the software that I have is oke (I Think) I use the hardware SPI module.

What I do is load the SSP2BUF with 0x10 (TX_ADDR)

Then the nRF24L01 sends back de status register with 0x06 as data,

Then I send 5 dummy bytes of 0xFF, but no data comes out of the nRF24L01.

Also when I measure the 2 OSC pins op de 24L01 ref to ground, they are zero no sine wave comes out of the crystal.

5

Problem solved, CKE had to be set in the uC

6

I Can read all register, but when I write one byte to TX buffer with the cmd 0xA0 (W_TX_PAYLOAD) and NOT toggle CE, the FIFO_STATUS and the STATUS Reg still shows that the TX Buffer is empty.

void write_rf(unsigned char adress, unsigned char DATAOUT[], unsigned char n)
{
    unsigned char i=0;
    //CE=1;
    CSN=0;
    SSP2BUF=adress;
    spi_waitForIdle();
    STATUSREG=SSP2BUF;
    for ( i=0;i<n;i++ )
    {
        SSP2BUF=DATAOUT[i];
        spi_waitForIdle();
    }
   



MAIN:

Read_SPI(FLUSH_TX,&testdata,0);
Read_24L01();
                
RFDATA[0]=0b10100101;
write_rf(W_TX_PAYLOAD, RFDATA, 1);
DELAY15US;
Read_SPI(ASTATUSREG, &STATUSREG, 1);   //FIFO is Still empty
DELAY15US;
CE=1;
DELAY15US;
CE=0;
Read_SPI(ASTATUSREG, &STATUSREG, 1);
7

I Can write the TX buffer, but when I toggle the CE pin de 24L01 resets completely.

I made the PCB myself accourding the ref design in the datasheet.

8 
/* InitSPI */

void InitSPI(void)
{
SSP2CON1=0b00100001; // set SPI master mode
SSP2STAT=0b01000000;
}


/* SPI waitforidle */

void spi_waitForIdle(void)
{
while ( PIR3bits.SSP2IF==0 )
{
/* EasyCODE < */
// wait for idle and not writing
/* EasyCODE > */
}
PIR3bits.SSP2IF=0;
}


/* Read SPI */

void Read_SPI (unsigned char adress, unsigned char DATAIN[5], unsigned char n)
{
unsigned char i=0;
CSN=0;
//read register
SSP2BUF=adress;
spi_waitForIdle();
STATUSREG=SSP2BUF;
for ( i=0;i<n;i++ )
{
SSP2BUF=255;//dummy data
spi_waitForIdle();
DATAIN=SSP2BUF;
}
CSN=1;
}

/* Write SPI */

void write_spi(unsigned char adress, unsigned char DATAIN)
{
unsigned char i=0;
CSN=0;
SSP2BUF=(0b100000|adress);
spi_waitForIdle();
STATUSREG=SSP2BUF;
SSP2BUF=DATAIN;
spi_waitForIdle();
CSN=1;
}

/* Read registers nRF24L01 */

void Read_24L01 (void)
{
Read_SPI(ACONFIG, &CONFIG, 1);
Read_SPI(AEN_AA, &EN_AA, 1);
Read_SPI(AEN_RXADDR, &EN_RXADDR, 1);
Read_SPI(ASETUP_AW, &SETUP_AW, 1);
Read_SPI(ASETUP_RETR, &SETUP_RETR, 1);
Read_SPI(ARF_CH, &RF_CH, 1);
Read_SPI(ARF_SETUP, &RF_SETUP, 1);
Read_SPI(ASTATUSREG, &STATUSREG, 1);
Read_SPI(AOBSERVE_TX, &OBSERVE_TX, 1);
Read_SPI(ACD, &CD, 1);
Read_SPI(ARX_ADDR_P0, RX_ADDR_P0, 5);
Read_SPI(ARX_ADDR_P1, RX_ADDR_P1, 5);
Read_SPI(ARX_ADDR_P2, &RX_ADDR_P2, 1);
Read_SPI(ARX_ADDR_P3, &RX_ADDR_P3, 1);
Read_SPI(ARX_ADDR_P4, &RX_ADDR_P4, 1);
Read_SPI(ARX_ADDR_P5, &RX_ADDR_P5, 1);
Read_SPI(ATX_ADDR, TX_ADDR, 5);
Read_SPI(ARX_PW_P0, &RX_PW_P0, 1);
Read_SPI(ARX_PW_P1, &RX_PW_P1, 1);
Read_SPI(ARX_PW_P2, &RX_PW_P2, 1);
Read_SPI(ARX_PW_P3, &RX_PW_P3, 1);
Read_SPI(ARX_PW_P4, &RX_PW_P4, 1);
Read_SPI(ARX_PW_P5, &RX_PW_P5, 1);
Read_SPI(AFIFO_STATUS, &FIFO_STATUS, 1);
Read_SPI(ADYNPD, &DYNPD, 1);
Read_SPI(AFEATURE, &FEATURE, 1);
}

/* Write nRF24L01 */

void write_rf(unsigned char adress, unsigned char DATAOUT[], unsigned char n)
{
unsigned char i=0;
write_spi(ASTATUSREG, 0b01111110);
write_spi(ACONFIG, 0b00001010);
write_spi(FLUSH_TX,0);
CSN=0;
SSP2BUF=adress;
spi_waitForIdle();
STATUSREG=SSP2BUF;
for ( i=0;i<n;i++ )
{
SSP2BUF=DATAOUT;
spi_waitForIdle();
}
CSN=1;
}


/* void SETTX(void) */

void SETTX(void)
{
CE=0;
write_spi(ACONFIG, 0b00001000);
write_spi(ASETUP_RETR,0);
write_spi(ASETUP_AW,0b00000111);
write_spi(ARF_SETUP, 0b00000111);
write_spi(ARF_CH, 0b00000010);
write_spi(AEN_AA, 0b00000000);
DLCD5MS;
Read_24L01();

}



void SETRX(void)
{
    CE=0;
    write_spi(ACONFIG, 0b00001001);
    write_spi(ASETUP_RETR,0);
    write_spi(ASETUP_AW,0b00000111);
    write_spi(ARF_SETUP, 0b00000111);
    write_spi(ARF_CH, 0b00000010);
    write_spi(AEN_AA, 0b00000000);
    Read_24L01();
    CE=1;
}

MAIN PROGRAM TX (part of it)

write_rf(W_TX_PAYLOAD, RFDATA, 1);
Read_24L01();
DLCD5MS;

CE=1;
DLCD1MS;
DLCD1MS;
CE=0;
DLCD5MS;
Read_24L01();

MAIN PROGRAM RX(part of it)

if ( IRQ==0 )
{
    GLEDS=1;
    Read_24L01();
}
else
{
    GLEDS=0;
    Read_24L01();

}

This works for the TX, the IRQ pin goes low after I toggle CE bit and the STATUSREG reports send data.

But on the receiver site nothing IRQ pin doesn’t go low.

Both new chips, antenna’s lie next to each other.

What could it be ?