STM32F107 external clock trouble

Development Boards MicroMod
1

Hi,

I’ve just started working with the ARM-processors. I’ve currently written some code for working with my 5,7" display. Now I’m trying to increase my processor speed. My board (Olimex STM32-H107) has a 25 MHz external clock.

I’m trying to get a 50MHz speed, but I don’t seem to get any improvements at all.

Here is my code based on the RM0008 reference manual:

//External clock enable.
  RCC_CR |= (1 << RCC_CR_HSEON_BIT);
  while(!(RCC_CR & 0x20000));
  
  //Sets HSE prescale by 2.
  RCC_CFGR |= (1 << RCC_CFGR_PLLXTPRE_BIT);

  //Use HSE as PLL input.
  RCC_CFGR |= (1 << RCC_CFGR_PLLSRC_BIT);

  //Set flash prefetch.
  FLASH_ACR |= FLASH_ACR_PRFTBE;

  //Set multiplier to x4.
  RCC_CFGR |= (1 << 19);
  
  //Enable Pll.
  RCC_CR |= RCC_CR_PLLON;
  while((RCC_CR & RCC_CR_PLLRDY) == 0);

What am I doing wrong? And also: What is the highest speed possible with a 25MHz external crystal?

Regards,

Simon H.A.

2

I don’t see the code to connect the PLL output to anything.

If you are using the system init file (system_stm32f10x.c) then you can change some #defines there to configure the clock system.

3

[edit]Sorry - hit the reply button before I realized how different the connectivity devices are. :oops:

4

I’m using the CrossWorks compiler. Does it have a system init file?

And what do you mean with that the PLL is not connection to anything? I’ve selected HSE as PLL input and enabled PLL. Isn’t that enough?

5

I managed to get a much higher speed by doing some better reading on the reference manual. I’m not sure what the speed is. With my ST-LINK the number of cycles is around 150,000,000/sec.

I got the speed I need. Can you figure out what my speed is? Here is my code:

//External clock enable.
  RCC_CR |= (1 << RCC_CR_HSEON_BIT);
  while( (RCC_CR & RCC_CR_HSERDY) == 0);
  
  //Flash latency = two wait states.
  FLASH_ACR |= (0 << 0);
  FLASH_ACR |= (1 << 1);
  FLASH_ACR |= (0 << 0);

  //HSE as PLL entry clock source.
  RCC_CFGR |= (1 << RCC_CFGR_PLLSRC_BIT);

  //PLL as system clock.
  RCC_CFGR |= (1 << 1);

  //SYSCLK divided by 0.
  RCC_CFGR |= (0 << 7);

  //PLL x12
  RCC_CFGR |= (1 << 19);
  RCC_CFGR |= (1 << 21);

  //Enable PLL.
  RCC_CR |= (1 << RCC_CR_PLLON_BIT);
  while((RCC_CR & RCC_CR_PLLRDY) == 0);

Edit: My external crystal is 25MHz.

Regards,

Simon H.A.