Hello,
I try to use openocd with an STR750eval board, but I didn’t manage to configure the openocd.cfg file. I write a new one from an example for the str71x, which work well for an STR710eval board.
I think my problem is on the jtag scan chain, but I haven’t found any example for configuring it. I don’t understand enough the configuration of the scanning chain to find the good jtag_device line to add.
When I tried to connect to the board, I have the following error :
Warning: str7x.c:191 str7x_flash_bank_command(): overriding flash base address for STR75x device with 0x20000000
Warning: arm7_9_common.c:683 arm7_9_assert_reset(): srst resets test logic, too
Warning: jtag.c:1068 jtag_read_buffer(): value captured during scan didn't pass the requested check: captured: 0x0f check_value: 0x01 check_mask: 0x0f
Error: arm7_9_common.c:610 arm7_9_poll(): JTAG queue failed while reading EmbeddedICE status register
I put my config file for any comment, which will be very appreciate :
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface parport
#parport_port 0x378
parport_port 0
parport_cable wiggler
jtag_speed 0
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi
run_and_halt_time 0 30
working_area 0 0x30002000 0x2000 backup
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> <variant> <target#>
# variant is one of STR71x, STR73x or STR75x
flash bank str7x 0x20000000 0x00040000 0 0 STR75x 0
flash bank str7x 0x200C0000 0x00004000 0 0 STR75x 0
Thank for your help.
Patrick
The only change from the str710 is that this is a ARM7TDMI-S
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
not that it should make any difference, not checked but think this is not used for arm7 any more.
Also make sure you slow the jtag clock down while first getting the system running, eg. jtag_speed 5. Speed up again when it all behaves as expected.
Attach a log if you still have problems.
Regards
Spen
Hello Spen, and thanks for your response.
I replace the variant with arm7tdmi-s_r4 but it doesn’t change anything.
I also add a jtag_speed 9 line in my config file, without any improvement.
When I run openocd, it does a reset of the board, but doesn’t grant me to hook on the micro controller.
Here is a log file, hope this will help :
Info: openocd.c:84 main(): Open On-Chip Debugger (2007-01-31 12:00 CET)
Warning: str7x.c:191 str7x_flash_bank_command(): overriding flash base address for STR75x device with 0x20000000
Debug: jtag.c:1329 jtag_init():
Debug: parport.c:328 parport_init(): opening /dev/parport0...
Debug: parport.c:340 parport_init(): ...open
Debug: parport.c:212 parport_reset(): trst: 0, srst: 0
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1126 jtag_reset_callback():
Debug: bitbang.c:223 bitbang_execute_queue(): statemove end in 0
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1126 jtag_reset_callback():
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in 0
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x92063579000000ff
Debug: jtag.c:1027 jtag_read_buffer(): fields[0].in_value: 0x000000ff4f1f0041
Debug: jtag.c:1214 jtag_examine_chain(): JTAG device found: 0x4f1f0041 (Manufacturer: 0x020, Part: 0xf1f0, Version: 0x4
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1126 jtag_reset_callback():
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in 0
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x3f
Debug: jtag.c:1027 jtag_read_buffer(): fields[0].in_value: 0x31
Debug: openocd.c:102 main(): jtag init complete
Debug: embeddedice.c:203 embeddedice_read_reg_w_check(): 4
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: TRST released
Debug: jtag.c:1126 jtag_reset_callback():
Debug: bitbang.c:198 bitbang_execute_queue(): end_state: 8
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in -1
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x02
Debug: jtag.c:1027 jtag_read_buffer(): fields[0].in_value: 0x01
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in -1
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x02
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in -1
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x0c
Debug: jtag.c:1027 jtag_read_buffer(): fields[0].in_value: 0x01
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in -1
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x00000000
Debug: jtag.c:996 jtag_build_buffer(): fields[1].out_value: 0x04
Debug: jtag.c:996 jtag_build_buffer(): fields[2].out_value: 0x00
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in -1
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x00000000
Debug: jtag.c:996 jtag_build_buffer(): fields[1].out_value: 0x04
Debug: jtag.c:996 jtag_build_buffer(): fields[2].out_value: 0x00
Debug: jtag.c:1027 jtag_read_buffer(): fields[0].in_value: 0x40000000
Debug: arm7_9_common.c:656 arm7_9_assert_reset(): target->state: unknown
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug: jtag.c:1126 jtag_reset_callback():
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1126 jtag_reset_callback():
Warning: arm7_9_common.c:683 arm7_9_assert_reset(): srst resets test logic, too
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: SRST asserted
Debug: jtag.c:1126 jtag_reset_callback():
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: TRST asserted
Debug: jtag.c:1126 jtag_reset_callback():
Debug: bitbang.c:205 bitbang_execute_queue(): reset trst: 1 srst 1
Debug: parport.c:212 parport_reset(): trst: 1, srst: 1
Debug: bitbang.c:251 bitbang_execute_queue(): sleep
Debug: bitbang.c:205 bitbang_execute_queue(): reset trst: 1 srst 1
Debug: parport.c:212 parport_reset(): trst: 1, srst: 1
Debug: bitbang.c:251 bitbang_execute_queue(): sleep
Debug: arm7_9_common.c:722 arm7_9_deassert_reset(): target->state: reset
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: SRST released
Debug: jtag.c:1126 jtag_reset_callback():
Debug: bitbang.c:205 bitbang_execute_queue(): reset trst: 0 srst 0
Debug: parport.c:212 parport_reset(): trst: 0, srst: 0
Debug: openocd.c:106 main(): target init complete
Debug: openocd.c:110 main(): flash init complete
Debug: openocd.c:114 main(): pld init complete
Debug: gdb_server.c:1347 gdb_init(): gdb service for target arm7tdmi at port 3333
Debug: embeddedice.c:203 embeddedice_read_reg_w_check(): 1
Debug: jtag.c:278 jtag_call_event_callbacks(): jtag event: TRST released
Debug: jtag.c:1126 jtag_reset_callback():
Debug: bitbang.c:198 bitbang_execute_queue(): end_state: 8
Debug: bitbang.c:237 bitbang_execute_queue(): scan end in -1
Debug: jtag.c:996 jtag_build_buffer(): fields[0].out_value: 0x02
Debug: jtag.c:1027 jtag_read_buffer(): fields[0].in_value: 0x0f
Warning: jtag.c:1068 jtag_read_buffer(): value captured during scan didn't pass the requested check: captured: 0x0f check_value: 0x01 check_mask: 0x0f
Error: arm7_9_common.c:610 arm7_9_poll(): JTAG queue failed while reading EmbeddedICE status register
I have found my mistake : It is necessary to put the following lines in the config file :
jtag_nsrst_delay 100
jtag_ntrst_delay 100
Thanks for your help.