SWD Implementation help on Cortex-M0 and Cortex-M3

Can anyone point me to any documentation or information concerning the implementation of Serial Wire Debug (SWD) on a Cortex-M3 or Cortex-M0? I have read the ARM Debug Interface v5 Architecture Specification, but many elements are listed as implementation defined. I need to know actually implementation details concerning NXP’s LPC1114 (Cortex-M0) and/or Luminary Micro’s LM3S811 (Cortex-M3).

Can anyone point me to any documentation or provide any information not immediately found in any respective manual? I have googled and searched through several forums already to no avail.

Thank you,

I think that you have to contact NXP and TI directly for that sort of information. You will probably need to sign an NDA.

I use the Rowley CrossConnect Pro with CrossWorks for SWD with NXP and ST ARM chips.

I would look at the [source code of the [Versaloon project. It implements SWD for multiple ARM Cortex-M3 targets.](http://www.versaloon.com/)](Google Code Archive - Long-term storage for Google Code Project Hosting.)

ARM opened the document for SWD protocol.

It’s much easier than JTAG.