Hi All,
I am a beginner to this OpenOCD project. I’m doing my postgraduate research on “Onchip debugging”.
I heared that software tools using in the industry like “chipscope pro” or “signal tap” they are using internal logic analyzers or testing cores to test FPGA or PLD’s. Can we use a logic analyser cores with openocd? if it is not available can i develope that kind of feature to openOCD? i love OpenOCD. its interesting.Thanks
Nuwan