can i use this “ublox max-10S” external circuit for antenna to work with “ublox max-M10” with sparkfun library or should i use the recommended “ublox max-M10” external circuit for antenna in ublox integration manual
mahmoud ayman:
can i use this external circuit for antenna to work with “ublox max-M10” to work with sparkfun library or should i use the external circuit for antenna for " ublox max-10S" schematics
This would be suitable if you want to gate power to an external active antenna.
Is that what you want to achieve?
i want to activate and deactivate the antenna just for porpose need using LNA_EN pin, so i am asking for which circuit should i go for as i saw two different schematics, in addition two, is the schematic in “ublox MAX-M10M” familiar with sparkfun library?
Hello Mahmoud,
On the MAX-M10S, the LNA _EN is normally high (3.3V) while the module is running. If you send a Power Management request (UBX_RXM_PMREQ), to put the module to sleep, the LNA_EN pin goes low (0V) while the module is asleep. When the module wakes, the LNA_EN pin goes high again. Please see this example:
https://github.com/sparkfun/SparkFun_u- … werOff.ino
It is possible to invert this by setting the Configuration Interface CFG-HW-ANT_CFG_PWRDOWN_POL (Power down antenna logic polarity) key to 1. Then, the LNA_EN pin is low while the module is running and high while it is asleep. With our library, the code would be:
myGNSS.setVal8(UBLOX_CFG_HW_ANT_CFG_PWRDOWN_POL, 1);
Set it to 0 again, to restore the setting.
If you do not use sleep (UBX_RXM_PMREQ), you can cheat by using UBLOX_CFG_HW_ANT_CFG_PWRDOWN_POL to set LNA_EN high or low.
I hope this helps,
Paul
@clive1 : just for info, I think there’s a typo in the u-blox M10 SPG 5.00 - Interface description (UBX-20053845 - R01) Configuration defaults. It says the default for CFG-HW-ANT_CFG_PWRDOWN_POL is “1”. But on the MAX-M10S module I have (FWVER SPG 5.00, PROTVER 34.00), it defaults to “0”.
@PaulZC Probably not a typo, that’s the generic M10 document, there are some OTP settings programmed at the factory to change the “defaults” on the MAX-M10S
Not sure there’s a vast number of SPG 5.00 devices in the wild, as soon as the engineering samples went out there were enough issues the ROM and clocking speed it was spun almost immediately.
Most should be SPG 5.10 (MAX-M10S-00B), and depending on the module might be configured at 9600 or 38400 baud. My original MAX-M10S were 38400 w/SPG 5.00, but apparently that caused headaches for some of the drop-in-replacement customers, so the OTP sets them to 9600 baud, with GSV at 1/5th Hz. The SPG 5.10 also typically runs the MCU at 192 MHz rather than 128 MHz
Many thanks Clive - good to know,
Paul
SPG 5.10 ROM Defaults
10A3002E CFG-HW-ANT_CFG_VOLTCTRL 0 FALSE
10A3002F CFG-HW-ANT_CFG_SHORTDET 0 FALSE
10A30030 CFG-HW-ANT_CFG_SHORTDET_POL 1 TRUE
10A30031 CFG-HW-ANT_CFG_OPENDET 0 FALSE
10A30032 CFG-HW-ANT_CFG_OPENDET_POL 1 TRUE
10A30033 CFG-HW-ANT_CFG_PWRDOWN 0 FALSE
10A30034 CFG-HW-ANT_CFG_PWRDOWN_POL 1 TRUE
10A30035 CFG-HW-ANT_CFG_RECOVER 0 FALSE
20A30036 CFG-HW-ANT_SUP_SWITCH_PIN 07 7
20A30037 CFG-HW-ANT_SUP_SHORT_PIN 06 6
20A30038 CFG-HW-ANT_SUP_OPEN_PIN 05 5
30A3003C CFG-HW-03C 01F4 500 ?? Recovery Time ??
20A30054 CFG-HW-ANT_SUP_ENGINE 00 0
20A30055 CFG-HW-ANT_SUP_SHORT_THR 00 0
20A30056 CFG-HW-ANT_SUP_OPEN_THR 00 0
MAX-M10S-00B OTP Settings
A4 16 [22] : Product Name/Configuration
50A30049 4D 41 58 2D 4D 31 30 53 CFG-HW (MAX-M10S)
10A3002E 01 CFG-HW-ANT_CFG_VOLTCTRL (TRUE)
10A30034 00 CFG-HW-ANT_CFG_PWRDOWN_POL (FALSE)
A4 0D [13] : Product Name/Configuration
40520001 80 25 00 00 CFG-UART1-BAUDRATE (9600)
209100C5 05 CFG-MSGOUT-NMEA_ID_GSV_UART1 (1/5th NAVRATE)
A4 0F [15] : Product Name/Configuration
1031000F 00 CFG-SIGNAL-BDS_B1C_ENA (FALSE)
1031000D 01 CFG-SIGNAL-BDS_B1_ENA (TRUE)
10310022 01 CFG-SIGNAL-BDS_ENA (TRUE)