Has anyone had success using OpenOCD to debug an AT91SAM9260, e.g. halting or resetting and then resuming the target? Specifically on the AT91SAM9260-EK dev board.
Which OpenOCD revision works? Would you mind sharing your initialisation script(s)?
Thanks!
Pieter Conradie
pieterc,
I’m looking at buying the OpenOCD debugger to use with the Olimex AT91SAM9260 eval board (l9260) and wondered if you ever got it working with the AT92SAM9260? If you did do you have a sample config file?
Regards,
Shane
Hi Shane,
I use Rev 734 and it works. I guess that the Yagarto website’s Rev 717 will also work.
Best regards,
Pieter
openocd.exe -f interface/arm-usb-tiny.cfg -f target/AT91SAM9260.cfg
arm-usb-tiny.cfg:
######################################
######################################
######################
######################
telnet_port 4444
gdb_port 3333
gdb_detach resume
gdb_memory_map enable
gdb_flash_program enable
daemon_startup reset
##############################
##############################
interface ft2232
################
################
ft2232_device_desc “Olimex OpenOCD JTAG TINY A”
ft2232_layout “olimex-jtag”
ft2232_vid_pid 0x15BA 0x0004
ft2232_latency 2
AT91SAM9260.cfg:
######################################
######################################
##############################
##############################
jtag_speed 1200
#reset_config [combination] [trst type] [srst type]
reset_config trst_and_srst
#jtag_device
jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 200
jtag_ntrst_delay 0
######################
######################
#target
target arm926ejs little reset_init 0 arm926ejs
target_script 0 pre_reset event/at91sam9260_pre_reset.script
target_script 0 post_reset event/at91sam9260_post_reset.script
run_and_halt_time 0 30
#working area <target#> <backup|nobackup>
working_area 0 0x00300000 0x1000 backup
#####################
#####################
#flash bank cfi <target#>
flash bank cfi 0x10000000 0x01000000 2 2 0
at91sam9260_pre_reset.script:
jtag_speed 1200
halt
wait_halt
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
at91sam9260_post_reset.script:
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
mww 0xfffffc20 0x00004001 # CKGR_MOR : enable the main oscillator
sleep 20 # wait 20 ms
mww 0xfffffc30 0x00000001 # PMC_MCKR : switch to main oscillator
sleep 10 # wait 10 ms
mww 0xfffffc28 0x2060bf09 # CKGR_PLLAR: Set PLLA Register for 198,656MHz
sleep 20 # wait 20 ms
mww 0xfffffc30 0x00000101 # PMC_MCKR : Select prescaler
sleep 10 # wait 10 ms
mww 0xfffffc30 0x00000102 # PMC_MCKR : Clock from PLLA is selected
sleep 10 # wait 10 ms
jtag_speed 0 # Increase JTAG Speed to 6 MHz
arm7_9 dcc_downloads enable # Enable faster DCC downloads
mww 0xfffff870 0xffff0000 # PIO_ASR : Select peripheral function for D15…D31
mww 0xfffff804 0xffff0000 # PIO_PDR : Disable PIO function for D15…D31
mww 0xffffef1c 0x2 # EBI_CSA : Assign EBI Chip Select 1 to SDRAM
mww 0xffffea08 0x85227259 # SDRAMC_CR : Configure SDRAM (2 x Samsung K4S561632H-UC75 : 4M x 16Bit x 4 Banks)
mww 0xffffea00 0x1 # SDRAMC_MR : issue a NOP command
mww 0x20000000 0
mww 0xffffea00 0x2 # SDRAMC_MR : issue an ‘All Banks Precharge’ command
mww 0x20000000 0
mww 0xffffea00 0x4 # SDRAMC_MR : issue 8 x ‘Auto-Refresh’ Command
mww 0x20000000 0
mww 0xffffea00 0x4
mww 0x20000000 0
mww 0xffffea00 0x4
mww 0x20000000 0
mww 0xffffea00 0x4
mww 0x20000000 0
mww 0xffffea00 0x4
mww 0x20000000 0
mww 0xffffea00 0x4
mww 0x20000000 0
mww 0xffffea00 0x4
mww 0x20000000 0
mww 0xffffea00 0x4
mww 0x20000000 0
mww 0xffffea00 0x3 # SDRAMC_MR : issue a ‘Load Mode Register’ command
mww 0x20000000 0
mww 0xffffea00 0x0 # SDRAMC_MR : normal mode
mww 0x20000000 0
mww 0xffffea04 0x5d2 # SDRAMC_TR : Set refresh timer count to 15us