Hello,
I am having problems to program the AT91SAM7X256 with the openocd. I erased the controller with the erase pin and then I start openocd. This is what I get:
C:\Documents and Settings\Ad van de Laar\Bureaublad\Linkey dummy boot>openocd-ft
d2xx.exe -farm7_ft2232.cfg
Info: openocd.c:86 main(): Open On-Chip Debugger (2007-04-16 19:30 CEST)
Warning: arm7_9_common.c:685 arm7_9_assert_reset(): srst resets test logic, too
Warning: jtag.c:1068 jtag_read_buffer(): value captured during scan didn’t pass the requested check: captured: 0x0f check_value: 0x01 check_mask: 0x0f
After this message the openocd just waits and I must remove the power from the target shortly to get the device programmed…
Info: target.c:227 target_init_handler(): executing reset script ‘openocd_at91sam7s_flash.script’
Info: configuration.c:50 configuration_output_handler(): requesting target halt…
Warning: arm7_9_common.c:877 arm7_9_halt(): target was already halted
Info: configuration.c:50 configuration_output_handler(): target already halted
Warning: arm7_9_common.c:2010 arm7_9_write_memory(): memory write caused data abort (address: 0xfffffd44, size: 0x4, count: 0x1)
Info: configuration.c:50 configuration_output_handler(): error: access caused data abort, system possibly corrupted
Info: configuration.c:50 configuration_output_handler(): dcc downloads are enabled
etc…
After programming the device everything works well. What is wrong with my configuration. I want to change the config files, so I don’t have to disconnect the power from the target board.
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface ft2232
ft2232_device_desc “Olimex OpenOCD JTAG A”
ft2232_layout “olimex-jtag”
ft2232_vid_pid 0x15BA 0x0003
jtag_speed 2
#use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target
#target arm7tdmi
target arm7tdmi little run_and_init 0 arm7tdmi
#target arm7tdmi little run_and_init 0 arm7tdmi_r4
run_and_halt_time 0 30
flash-options AT91
target_script 0 reset openocd_at91sam7s_flash.script
working_area 0 0x00200000 0x4000 nobackup
#working_area 0 0x40000000 0x4000 nobackup
flash bank at91sam7 0 0 0 0 0
For more information about the configuration files, take a look at:
http://openfacts.berlios.de/index-en.ph … p+Debugger
This is the script file:
The following command wills be executed on
reset (because of run_and_init in the config-file)
- halt target
- init ecr
- flash content of file main.bin into target-memory
- shutdown openocd
created by Martin Thomas
http://www.siwawi.arubi.uni-kl.de/avr_p … m_projects
based on information from Dominic Rath
halt
sleep 10
Init - taken form the script openocd_at91sam7_ecr.script
mww 0xfffffd44 0x00008000 # disable watchdog
mww 0xfffffd08 0xa5000001 # enable user reset
mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
sleep 10
mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
sleep 10
mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
sleep 10
mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
arm7_9 force_hw_bkpts enable # program resides in flash
AT91SAM7 flash command-“batch”
adapted by Martin Thomas based on information from Dominic Rath - Thanks
arm7_9 dcc_downloads enable
sleep 10
poll
flash probe 0
flash erase 0 0 15
at91sam7 gpnvm 0 2 set
flash write 0 SSSPE_bootloader_256.bin 0x0
reset run
sleep 10
shutdown
Can I also enable the security bit with the openocd after programming the device? Thanks in advance for your help.
Kind regards,
Mark