Communicating board outline

Archive BatchPCB
1

I recently did 6 designs in two orders, and by and large I’m quite happy with them and the price for low quanties (I did 4 to 12 copies of each board).

My question relates to getting the board outline correct, as all of my designs were trimmed a little small. Quoting the FAQ:

This is normally done with a drawing layer, a keep out layer, or a silkscreen layer. You can use any method you want but please use one! Something as simple as a rectangle on the top overlay layer is great!

On all of my boards the back is mostly ground plane, with traces plowed through it. The ground polygon stops 0.020 from the edge of the board because I want the mask to cover the ground plane to avoid accidental shorts with the edge of the board. (Just a good standard practice.) Other services I have used will give a DRC kick-out if you take copper up to the edge, FWIW.

Anyway, to define the outline, I have a rectangle on the back silk. It is drawn with an 0.010 line, centered on the desired board outline, which is how the outline would be drawn for a fab house that wants an outline layer.

All of my boards came back trimmed to the edge of the ground polygon. In other words, whoever picked the cutting line ignored my silk rectangle and in fact whacked it off, and snapped to the edge of the copper.

All of the boards are functional this way, of course, and perfectly good as prototypes. I’d reject them as production boards, though, so Gold Phoenix wouldn’t get my production business if there wasn’t a way to correctly communicate the board outline.

In any case, I’m happy enough with the boards that I will certainly be doing more prototypes with BatchPCB, but it would be nice if I could learn to communicate the board outline in a way everybody understands. What should I do on my next design?

Thanks,

Dave

2

Dave,

As I understand it…the Batch PCB service does not use the back silk.

I think the outline would have to be on the top silk, not the bottom.

I do not know if this will cause problems because of space, but I’m sure someone from Batch PCB will also add to this thread.

Also make sure to use the silk_gen.ulp to make the silk think enough that it is actually printed by their machinery. I’m not sure if they would be able to print 0.010 lines.

Also…if the boards are separated, they may be using a saw to separate, and the kerf may have taken up a lot of the board material if the panel was laid out with no space between each board.

Panel layout can be a bear…especially if you don’t know the separation method.

If the edges are square and smooth, a saw was used, so this may be the problem.

James L

3

dbc:
My question relates to getting the board outline correct, as all of my designs were trimmed a little small. Quoting the FAQ:

This is normally done with a drawing layer, a keep out layer, or a silkscreen layer. You can use any method you want but please use one! Something as simple as a rectangle on the top overlay layer is great!

Greetings Dave,

Have you read these threads?

[board outline specification

[Dimension Layer 20 Eagle

[eagle and board dimensions (rounded corners)

Comments Welcome!](eagle and board dimensions (rounded corners) - SparkFun Electronics Forum)](Dimension Layer 20 Eagle - SparkFun Electronics Forum)](board outline specification - SparkFun Electronics Forum)

4

As I understand it…the Batch PCB service does not use the back silk.

They were happy enough to *print* my back silk on 6 designs. By "use" did you mean "use it for outline"?

I think the outline would have to be on the top silk, not the bottom.

Hmmm... must be front silk? I guess a literal interpretation of the FAQ would say that. But they said "communicate somehow"... I thought back silk would be as good as front silk. Maybe not. I can try that next time easily enough. If what they really mean by "communicate somehow" is "put it on your front silk, we'll ignore your back silk", why can't they simply say that?

I’m not sure if they would be able to print 0.010 lines.

My 6 designs say they can, and I must say quite nicely. I would be surprised if any but a backwater fabs with 3rd hand equipment couldn't handle 10 mil silk these days.

Also…if the boards are separated, they may be using a saw to separate, and the kerf may have taken up a lot of the board material if the panel was laid out with no space between each board.

That is their problem. Whoever lays out the panels accounts for kerf. Not customer. I have no idea which of the several different tools that they own are going to be used on the panel my design landed on, and I should not have to care.

Have you read these threads?

No, I hadn't found them. Thanks for the pointers! They seem Eagle(?)-centric, I use gEDA/pcb, so I am not familiar with the odd ball file names they are talking about. But in any case, it would seem to point to front silk as being the only layer that anyone looks at, so I'll try that. They also would seem to point to the BatchPCB people actually reading comments, which the FAQ would seem to indicate are not reliable -- that's why I avoided actually trying to communicate with a human.

Thanks for the input,

Dave

5

Dave,

I’m sorry…i didn’t realise you had ordered separate boards. (I missed that part) I was thinking they were panels which were separated by GP.

Hmmmm…

The situation has taken on a new meaning because the layout (panel/array) was done by someone else.

This could be a mistake by whoever laid out some of those panels for fabrication. (didn’t account for kerf of blade)

I see your frustration on the matter.

James L

6

I see your frustration on the matter.

Well, as I said the boards are fine as prototypes, so I’m not really too highly frustrated. It’s not getting in the way of progress. All the same, I’d like to find the magic incantation so that the same design file will yield the same result from BatchPCB as it does from other vendors. I really like being able to order just a few small boards with a nice solder mask and silk without have to pay a big dollar increment to get mask and silk.

7

I have always placed the dimension border on the component/front side rather than the solder/back and they were trimmed appropriately. My best guess is that the outline on the solder/back confused some automated process or person (though the why is a mystery since you would think either front or back would be equally valid).

I have some boards on order now with mostly solid ground planes on the back with approx 0.025 clearance. Curious to see whether I encounter the same issue or not (is someone confused by the ground plane, by the dimension on the back or was it just “the new guy” at the fab). Will report back on my results when they arrive.

8

OK, yes, I’m very interested is seeing what you get back. I was also wondering if the ground plane confused somebody some place, but at the same time I was a little surprised since I’ve had it go the other way – had my border pushed out to add clearance around a polygon.

Looking forward to your report.

-dave

9

I’ve ordered boards directly through goldphoenix with identical borders on the mechanical 1 layer and keep out layer, and they were trimmed exactly to the border I specified.

So they certainly have the machining capability to cut boards exactly where you specify.

Seems like a panelisation error to me, perhaps they have the bottom layers turned off when panelising.

10

Caffeine:
I’ve ordered boards directly through goldphoenix with identical borders on the mechanical 1 layer and keep out layer, and they were trimmed exactly to the border I specified.

So they certainly have the machining capability to cut boards exactly where you specify.

Seems like a panelisation error to me, perhaps they have the bottom layers turned off when panelising.

I think I have injected a thought process that is not true here.

These boards were ordered from Batch PCB. They were all “single” boards. The panelizing was done by Batch PCB not Gold Phoenix. Gold Phoenix only makes the panel/array. They require the panel/array to be laid out in an array for manufacturing.

I believe if there was an error in the panelizing step, it would be with someone from Batch PCB.

Gold Phoenix is going to make the panel as it is laid out, whether it is right or wrong.

I hope that clears up the thought I have started in this thread.

Sorry for adding confusion,

James L

11

Usually GP is pretty good at choosing which outline to route from, however to increase the chances that it goes perfect, put the silkscreen on the top layer. All the designs where I’ve put the silkscreen outline on the top have been routed correctly.

Cheers,

–David Carne

12

Following up on my earlier post, I received my boards last ween and they were trimmed properly. Like the original poster, they have a full ground plane on the back but unlike the OP, the dimension was drawn on the front. Based on the rest of the thread, that seems the most likely source of the confusion.

13

Yeah, I think you’re correct. I haven’t turned another set of boards yet, but I’ll be putting the outline on top silk. Seems like the FAQ should be updated… “communicate somehow” is not quite complete. It should say “draw outline on top silk.”

14

I would also like to add that an 8mil silk border on tsilk rather than 10mil might be more accurate (well at least within 2mils) and help a little. This is how I have indicated board dimension with batchpcb and GP directly with nearly perfect results.

As for the ground plane 20mil from the edge, while perfectly within their capacity, it seems a little close to me for most things. A greater tolerance on this would give some flexibility on the depanelization.

Some thoughts…

Brian

15

Hello,

I am ready to order some PCB’s from BatchPCB and here is my design:

  1. www.elektronika.ba/delme/top.png

  2. www.elektronika.ba/delme/bot.png

  3. www.elektronika.ba/delme/12181_lg.png

  4. www.elektronika.ba/delme/EAGLE.png

As you can see I had to put board outline on layer “121 _tsilk” so that the BOT can figure out my board outline.

On bot.png and top.png images you can see that some trimming has occured at the bottom of the board. Why did this happen? Will my board have dimensions&layout like on the third picture or what? :o

I would really like if my board is cut the way I want it :cry:

16

Muris:
Hello,

I am ready to order some PCB’s from BatchPCB and here is my design:

  1. www.elektronika.ba/delme/top.png

  2. www.elektronika.ba/delme/bot.png

  3. www.elektronika.ba/delme/12181_lg.png

  4. www.elektronika.ba/delme/EAGLE.png

As you can see I had to put board outline on layer “121 _tsilk” so that the BOT can figure out my board outline.

On bot.png and top.png images you can see that some trimming has occured at the bottom of the board. Why did this happen? Will my board have dimensions&layout like on the third picture or what? :o

I would really like if my board is cut the way I want it :cry:

I believe that the bot does each layer separately…that accounts for the trimming. If you look at the combination (.PNG) the board is not trimmed the same way.

The bolt can only deal with the information it has for each separate layer…that is why it is trimming it. Only when it combines the layers is the board outline going to be correct.

Please remember, this is speculation on my part, for I don’t work for Batch PCB. But the speculation does seem logical.

I find the same thing in most of my boards made by Batch PCB.

James L

17

Greetings (No Name Supplied),

Muris:
As you can see I had to put board outline on layer “121 _tsilk” so that the BOT can figure out my board outline.

Have you read these threads?

[board outline specification

[Dimension Layer 20 Eagle

[eagle and board dimensions (rounded corners)

Please post your EAGLE files (or PM me). I’d strongly

suggest copying the desired outline to layer 20 and

going through the Bot again.

Comments Welcome!](eagle and board dimensions (rounded corners) - SparkFun Electronics Forum)](Dimension Layer 20 Eagle - SparkFun Electronics Forum)](board outline specification - SparkFun Electronics Forum)

18

Helo,

Yes I have read them and they didn’t help much. For example, on the last link you gave, I quote:

whittenburg:
I’ve had luck with just drawing the requested board outline in the top silkscreen layer and including a note in the comments of the order to cut the board to the indicated outline, including notches.

chris

So…

Ok, here is my whole Eagle project: [Eagle PCB and SCH and here is the DRC bot’s output: [DRC preview image

I am still new to eagle and this is my first PCB made in Eagle.

When I want to export Gerber files, I use SPE-special.cam job and just process as it is.

Am I doing something wrong here?](OSH Park ~)](http://www.elektronika.ba/delme/4_spark_cc1101.rar)