Config file for STM32 + Wiggler (new OpenOCD config format)

Development Boards MicroMod
1

Hi

Since the *.cfg format changed, can anyone post a config file IN NEW FORMAT for stm32 + wiggler combo?

or at least in new format for:

  • cfg for stm32 (with ftdi)

  • cfg for wiggler (for arm7)

I am sure this will be helpful to bunch of people besides me

Cheers

Alex

2

… ok since no one wants to share … :roll: :lol:

here is what ended up working for me:

EDIT: these only worked in order for JTAG to see the device attached. Uploading binary doesn’t work with this config :x Please help!

i am using the following commands in telnet session:

halt
wait halt
poll
stm32x mass_erase 0
flash write_image build/main.bin 0x08000000 bin
reset run

Here is the error output i am getting. Can anyone see any immediate problems?

target state: halted
target halted due to undefined, current mode: Handler HardFault
xPSR: 0x01000003 pc: 0xfffffffe
> stm32x mass_erase 0
stm32x mass erase complete
> flash write_image build/main.bin 0x08000000 bin
empty section 0
wrote 0 byte from file build/main.bin in 0.000472s (0.000000 kb/s)
> reset run
JTAG device found: 0x3ba00477 (Manufacturer: 0x23b, Part: 0xba00, Version: 0x3)
JTAG device found: 0x16410041 (Manufacturer: 0x020, Part: 0x6410, Version: 0x1)
SWJ-DP STICKY ERROR
dcb_dhcsr 0x30003, nvic_shcsr 0x20000, nvic_cfsr 0x1001, nvic_bfar 0xe000edf8
SWJ-DP STICKY ERROR
dcb_dhcsr 0x30003, nvic_shcsr 0x20000, nvic_cfsr 0x1001, nvic_bfar 0xe000edf8
Block write error address 0xfffffd44, wcount 0x1
target state: halted
target halted due to undefined, current mode: Handler HardFault
xPSR: 0x01000003 pc: 0xfffffffe

stm32.cfg

#daemon configuration
telnet_port 4444
gdb_port 3333


# tell gdb our flash memory map
# and enable flash programming
gdb_memory_map enable
gdb_flash_program enable 

#interface
interface parport
parport_port 0 #this is specific to linux and different from windows
parport_cable wiggler
jtag_speed 0

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst

#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
jtag_device 5 0x1 0x1 0x1e

#target configuration
#daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>

target create STM32F103 cortex_m3 -endian little -chain-position 0

STM32F103 configure -event halted "script stm32_reset.script"

working_area 0 0x20000000 0x4000 nobackup

#flash configuration
flash bank stm32x 0x08000000 0x00010000 0 0 0

and the reset file stm32_reset.script

#
# Init - taken form the script openocd_at91sam7_ecr.script 
#
# I take this script from the following page:
#
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
mww 0xfffffd44 0x00008000	# disable watchdog
mww 0xfffffd08 0xa5000001	# enable user reset
mww 0xfffffc20 0x00000601	# CKGR_MOR : enable the main oscillator
sleep 10
mww 0xfffffc2c 0x00481c0e 	# CKGR_PLLR: 96.1097 MHz
sleep 10
mww 0xfffffc30 0x00000007	# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
sleep 10
mww 0xffffff60 0x003c0100	# MC_FMR: flash mode (FWS=1,FMCN=60)
sleep 100
3

ok, i think i found my problem

i tried main.bin that i’ve compiled under windows (using codesourcery toolchain for windows under cygwin) and it works (and doesn’t report “empty section 0”)

I am thinking something is wrong with the .ld files, or somehow the linux version of codesourcery doesn’t create a proper bin (i d/l codesourcery binaries, didn’t build them)

anyone had this problem under linux?

4

it appears i’ve been chasing my tail

forgot to include lib/src/stm32f10x_vector.o into the makefile

Cheers

5

hi i am getting a similar handler hardfault error in linux but i didnot find any vector.o in lib/src.can u suggest whats wrong