OK, so I’ve started designing my first PCB. Exciting. I’ve etched a double sided PCB and gotten good registration. Awesome. I drilled out hundreds of tiny through holes. Fantastic.
Now I am debugging and realized I don’t really know what I am doing. One problem I am having is that I am trying to place part TL072P , a linear opamp. When the preview is displayed in the library window it shows:
When I actually drop the part:
As you can see, it isn’t the same. I am missing some legs. Can anyone tell me where I’ve gone wrong? Thanks!
Don’t know why my uploads aren’t viewable. To describe it in text: it is an 8 pin DIP package. The library preview window shows all 8 pins, but when I place it in my schematic it only shows 6. Pins 1,2,3 and 5,6,7 . Pin 4 should be GND and Pin 8 should be VCC but they are missing…
never liked the idea of hidden power pins, wonder who does?
Power pins are omitted while designing many op-amp schematics. It's less clutter to worry about while concentrating on other aspects of the circuit.
However, I am usually drawing a schematic in Eagle with an eye to eventual PCB layout. I don’t even care for IC symbols that rearrange all the pins into a more “convenient” way. Laying out the schematic, at least for simple systems, is kind of a pre-board-layout phase for me.
Still, many will use Eagle’s schematic tools as a pure schematic drawing program, and in those cases I could see leaving out the op-amp power pins for a little more clarity.
Thanks guys. I ended up just slapping a generic 8 pin ic package and trying to match up the pinout. Hopefully I did it correctly but I will try out the right click, unhide method.
One of the reasons the Vcc/Gnd pins are separate is that you also usually have a bypass cap with them. This doubles the clutter. I wish eagle just dropped those pins when you place the first gate/amp/…
I think you are better off using the libraries that exist rather than a generic package. Fewer mistakes that way.
The VCC and GND are not shown by default, but they are connected to the VCC and GND nets. If you connect other stuff to these nets (like a battery or a connector, best using VCC and GND symbols from the power library) it will just ‘work’.
If you insist of seeing these pins, right-click / invoke will get them on your schematic and clutter it up a bit more.
Xantor:
The VCC and GND are not shown by default, but they are connected to the VCC and GND nets. If you connect other stuff to these nets (like a battery or a connector, best using VCC and GND symbols from the power library) it will just ‘work’.
the only problem there is that some people don't use Vcc symbol. When you have multiple voltages it get's a little tricky so I prefer to use +5V and 3.3V for my power symbols.
Xantor:
The VCC and GND are not shown by default, but they are connected to the VCC and GND nets. If you connect other stuff to these nets (like a battery or a connector, best using VCC and GND symbols from the power library) it will just ‘work’.
the only problem there is that some people don't use Vcc symbol. When you have multiple voltages it get's a little tricky so I prefer to use +5V and 3.3V for my power symbols.
indeed, hidden net connections are just a recipe for disaster
hidden net connections are just a recipe for disaster
I dunno. They’re very popular, professionally. Look at the published schematic for many a popular development board, and you see a big square with a bunch of labels on one page, and gates with labels attached to their leads on another page, and a final page with nothing but power pins and bypass caps.
I don’t like them much, but once you start seeing chips with 40+ pins, it certainly gets ugly to draw actual lines for every signal.
hidden net connections are just a recipe for disaster
I dunno. They’re very popular, professionally. Look at the published schematic for many a popular development board, and you see a big square with a bunch of labels on one page, and gates with labels attached to their leads on another page, and a final page with nothing but power pins and bypass caps.
I don’t like them much, but once you start seeing chips with 40+ pins, it certainly gets ugly to draw actual lines for every signal.
that isn’t what I called hidden, when theres an explicite label on a wire you can clearly see that is connected to that net
that is fine.
What I don’t like is when pins that might not even be shown on the schematic, like the power pins on some multiple opamp/gate symbols, is automatically connected to a net
Yes but those pins aren’t hidden. They just aren’t attached to the “main” symbol. The complaint here is that on a lot of packages, the power pins don’t get dropped onto the schematic unless you explicitly do it. And given that they are connected to some arbitrary power/ground labels (er, names), you could wind up with unconnected pins.
In a “professional” environment, all the libraries go through validation and thus all have consistent power/gnd labels. And, the designers and reviewers would (er, should) catch missing pins.