Hey,
I was wondering if you guys have an ETA on the carrier/breakout/dev board for the PSP LCD + touchscreen. It looks like a fantastic LCD and will be perfect for future projects. Just wondering if there has been any progress on the board. I read the board was to be released in like august but I haven’t seen anything about it being released.
Thanks,
-robodude666
Everything got delayed due to the addition of the new touchscreen.
The FPGA mainboard should be out real soon - we have the first production units off the line, and we’re just doing some documentation work / etc to get ready for release.
For the PSP LCD carrier, the LCD part itself works right, but theres a lot of jitter in the touchscreen that I’m still working on [just tried first rev PCB’s, second should clean it up].
Cheers,
–David Carne
Hey David,
Thanks for the super fast reply!
How complicated is the PSP LCD to use? 24bit sounds like a lot of bits X_X. Would a dsPIC or regular PIC be able to handle the PSP LCD at a reasonable frame rate? Or would an ARM+ be required to control the LCD?
Well, I’m excited! Think you guys can get 'em ready by around november? I could possible get one for my birthday! :lol:
Cheers,
-robodude666
As I said in another post, reading the PSP lcd datasheet, data should be clocked in continuously at a frquency of 8 to 9MHz, through a 24bit data bus. It even seems that lowering too much the update speed will deteriorate the display. I think that only a CPLD/FPGA with framebuffer, or a powerful microcontroller with onboard LCD interface (like the i.MX21) can drive it. Or… it’s time to start overclocking the ARM7 micros 
It is also necessary a big ram since 400KB are required to store an entire frame at the max color depth (24bit)
Any updates this week?
Are you going to release the FPGA mainboard ahead of the LCD carrier?
The FPGA mainboard is “any day now”, psp carrier is looking to be 2-3 weeks out.
Cheers,
–David Carne
I will try to contain my drool. 
FPGA Stuff:
http://www.sparkfun.com/commerce/catego … Path=2_136
PSP LCD carrier is in its final prototype sendout, should be ready for production soon.
Cheers,
–David Carne
I love you
I feel sorry for you guys, for having to make that devboard… so much soldering. I don’t know if I would still be sane for making just one.
Can’t wait for PSP LCD Carrier I am guessing that the example code will be for the Spartan 3E?
Yup, the example code is for that board, and the LCD carrier is designed to attach directly to the 56 pin header area labelled bank 3, but there is no reason you couldn’t extend it with a ribbon cable or something.
Cheers,
–David Carne
56pin header? EEK! Does it use all 56pins? Thats a lot of definitions… I thought it was a 24bit LCD… Your using parallel, or SPI or what? I’ll have to get myself a high-pin PIC if its 56pins…
How different is FPGA’s C from PIC’s? Please don’t tell me the example will be in ASM only =/
Cheers,
-robodude666
robodude666:
56pin header? EEK! Does it use all 56pins? Thats a lot of definitions… I thought it was a 24bit LCD… Your using parallel, or SPI or what? I’ll have to get myself a high-pin PIC if its 56pins…
The LCD has a 40-“pin” cable and the touch screen has four, so there is 44 of 56.
busonerd:
FPGA Stuff:
I’ve really been wanting to play around with a FPGA. This will be worth every penny of the $100 price tag, even if I never use it for the LCD. Are there any plans for a serial or USB programmer interface? I custom-built my PC and the motherboard does not have a parallel port. I’m assuming that the serial port supplied is just for serial communication and not programming.
MarkS:
busonerd:
FPGA Stuff:I’ve really been wanting to play around with a FPGA. This will be worth every penny of the $100 price tag, even if I never use it for the LCD. Are there any plans for a serial or USB programmer interface? I custom-built my PC and the motherboard does not have a parallel port. I’m assuming that the serial port supplied is just for serial communication and not programming.
Yup. There is a separate parallel programmer. The Serial is for communication. You can always get a parallel PCI board.
MarkS:
robodude666:
56pin header? EEK! Does it use all 56pins? Thats a lot of definitions… I thought it was a 24bit LCD… Your using parallel, or SPI or what? I’ll have to get myself a high-pin PIC if its 56pins…The LCD has a 40-“pin” cable and the touch screen has four, so there is 44 of 56.
40pin LCD… right ^^;; I forgot about that. 44pins hmm… yup… i’ll be getting a 87J50 after all.
robodude666:
You can always get a parallel PCI board.
No, I’d rather not. Once I get both graphics cards and the sound card, there will not be room.
robodude666:
How different is FPGA’s C from PIC’s? Please don’t tell me the example will be in ASM only =/
Well I can safely say that the example is not in ASM!
FPGAs make use of Hardware Description Languages (HDL) of which there are 2 that are by far the most popular. They are VHDL and Verilog and there are plenty of advantages and disadvantages to both.
Your current understanding of microprocessor programming will not help you much with FPGAs since you are not writing a program that is being excecuted, but instead are using syntax to describe the physical arrangement of logic gates and constructs within the FPGA. Someone has already posted the fpga4fun website which is a great resource for people looking to get their feet wet in programmable logic. Verilog is the HDL of choice on that site and for a beginner it is certainly easier. Verilog has a less complex syntax making it easier to pick up by a new user. VHDL is more complex but its true power lies in generating large designs where components are used over and over again.
Luckily there are lots of tutorials on the internet for both languages so you shouldn’t have any trouble learning either one of them. In the beginning, I was exposed to VHDL so that is what I default to when I need to get something up and running. When I have free time, I have slowly been trying to teach myself Verilog in order to keep my options open in the future.
-Bill
Hi,
Of the 56 pins on that connector, there are a good number of gnd/power/etc, since the main board is a pure breakout.
Of the pins left on that interface, there are 33 Input/Output pins, 7 Input only pins.
My IO budget is as follows:
Outputs: [33 available]
24 LCD Color
4 LCD Control [disp, vsync, hsync, clk]
3 Power control [LCD_VDD, LCD_AVDD, BL_ON]
3 TCS interface [SCK, SI, CS]
-------
Free: -1
Inputs: 7 available
3 TCS interface [SO, PENIRQ, BUSY]
-------
Free: 4
As you can see, I’m 1 short on the output side of things. The current solution the PSP carrier board uses is:
LCD_PWR_EN = DISP or (TSC_NCS and TSC_DIN);
That way, you can startup the LCD power by having both TSC_NCS high and TSC_DIN, then once the display is on using DISP, the display power will remain high. Keeping TSC_DIN low while the TSC is deselected [TSC_NCS = high] prevents the display from being turned on by accident.
Also, currently the PSP LCD controller code is all written in verilog.
Cheers,
–David Carne
Hi,
Any update on when will the PSP carrier board may arrive? Thanks.
Waiting patiently … 
Hi,
I know you’re all waiting patiently. I’ve got hopefully the final prototype on my desk, and whenever I get some time [2032, the way I’m going] I’m going to build it up and ensure it works, then it can be released for production.
Cheers,
–David Carne
yay
Have you been able to estimate how many FPS you can get out of that FPGA with full screen coloring?
-robodude666