Hello ladies and gents!
I believe I have completed my first PCB design and I was hoping to get some feedback. Its a really simple breakout board for two transistors and a gate driver.
Any input or suggestions would be greatly appreciated. Thanks!
First of all, those are some unusual and hard-to-solder packages; do you have the equipment and experience to mount them?
As for the layout, a few notes:
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You probably want the traces to the power and output connectors to be much fatter for low impedance and better current-handling. I would probably use pours rather than traces
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The gate traces are long and thin; you want them short and thick. Move the transistors right next to the gate driver and follow the recommended layout.
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You are missing a connection between LOW_S and GND. This needs to be thick and topside. Moving the transistors should let you do this.
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I would add a ground pin to JP3
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You don’t have any mounting holes
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Add board name and rev to the top silk
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Traces should connect to pads or other traces at right angles; acute angles can cause acid traps
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The connection between the top pours and bottom plane need more vias, though after moving the transistors, the high current paths may be unbroken
/mike
Thanks for the feedback n1ist,
I made a revision and also have some more questions if you’re willing to help. I will try to answer your questions/feedback in sequential order
1 - I changed the most of the power connections to pours rather than traces as you suggested. I’ll post the most recent revision below:
2 - I rearranged components and followed data sheets such that the gate lengths were as short as possible. I believe I tried to use small pours.
3 - Thanks for the low s and GND catch, I updated the schematic and fixed that connection.
4 - I believe the reason that I had no ground pin on JP3 is because they are considered to be coming from the same controller source. I (arbitrarily) chose to use 2 pin screw terminals, but both will likely be sourced from a controller. This board was really only a simple prototyping/testing of the GaN FETs and TI driver chip - for internal use. Do you think it would be worthwhile to add the ground pin anyway, just in case the power might be an external source?
5 - I decided against mounting holes because I don’t necessarily need to mount it anywhere and I think it should be okay.
6 - I forgot to add a board name (I’ll have to go back and add that in) but I added some info. to the bottom silk. I assume it is convention to add to the top instead of the bottom? Or possibly both?
7 - I added more vias between top and bottom ground, but do you think my method of connecting the low side source to ground will be effective or would you go about it differently?
I also have a few DRC errors and questions that I wanted to ask about and I added pictures below:
With respect to this picture, will the value show up on the silkscreen as it appears that it will? That being asked, do names of components show up on silkscreen as well?
The DRC errors were a “width” error:
I havent gotten this before and I am not exactly sure what it means. Any thoughts?
Thanks for all of the help and feel free to question the assertions I made earlier
With respect to this picture, will the value show up on the silkscreen as it appears that it will? That being asked, do names of components show up on silkscreen as well?
Yes, everything that is on the board will be printed, except for the little crosses that determines the origin. Use the smash command to move them around. It’s also more professional to only put the component name on the silk. No need to put the values since they are on the schematic and BOM.
The DRC errors were a “width” error:
I havent gotten this before and I am not exactly sure what it means. Any thoughts?
Looks like it’s pointing to the red space with the slashes. What width did you use to do the pours? A pic with the DRC still open to the exact area will help.
Looks a lot better. I’ll let someone else handle the Eagle issues as I don’t use Eagle myself.
I usually put a ground pin on I/O connectors as that way I can have one cable to the processor and a separate one to the power supply. It also separates the power ground, which is usually noisy due to switching loads, from the data ground. It also lets me use shielded cable, if needed. On the other hand, I see the benefit from standardized connectors.
I have also taken to putting a ground pad (or via with thermals) on the board, labelled GND on both sides. It’s a good place to solder a wire loop to clip meter leads or scope leads to.
As was mentioned, there are collisions in the silkscreen. I always do a final pass on my boards to make sure the silkscreen text (values, reference designators, etc) don’t hit each other, or sit on vias or pads. It makes for a cleaner board. You also have silkscreen on pads. If you can, when you generate the Gerbers, use the mask layer to mask the top silk. KiCad has such an option; not sure if Eagle does. While most board houses are smart, I have seen some that will happily put silk on top of the pads, which will cause soldering problems later on. While values are usually left off boards, I tend to leave them on for protos and for kits as that can make assembly easier. I would leave them off things like connectors, however. Labeling the connector pins, as you have done, is a great thing.
I would rotate CD1 and CD12 180 degrees so the grounds are on the right; that will give a better ground return path than having to loop around the 5V trace. I’d also add a stiching via in that area to reduce the path from U2 back to U1. High current and fast edges can make for some interesting effects, both with EMI and ringing.
/mike
Thanks mike and codlink,
I made those edits - turning around those caps was a great idea 
Codlink, you were completely right about the pour width - I picked an arbitrary width - 100 mic just to route it around and the DRC recognized that as smaller than the minimum size. I do have a bunch of stop mask errors like the one below:
Can anyone explain to me exactly what the stop mask is? Sadly I have no experience with the soldering involved. Putting this board together will be my first experience. Thanks again!
Stop mask is just what it sounds like. http://en.wikipedia.org/wiki/Solder_mask
Turn off the stop mask layer in Eagle. The errors will go away.