I am getting following message while I try to flash my chip ertec 200
“command handler execution failed.”
Below is my script.
===================
openocd 0.2.0 script for EB200 Siemens ERTEC Profinet Dev Kits
set ports
telnet_port 4444
gdb_port 3333
#interface/ Dongle configuration
interface ft2232
ft2232_device_desc “Amontec JTAGkey A”
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8
jtag_nsrst_delay 200
jtag_ntrst_delay 200
echo “test”
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME ertec
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
force an error till we get a good number
set _CPUTAPID 0x15946021
}
jtag speed. We need to stick to 16kHz until we’ve finished reset.
jtag_rclk 16
#use combined on interfaces or targets that can’t set TRST/SRST separately
reset_config trst_and_srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask)
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
#target configuration
set _TARGETNAME [format “%s.cpu” $_CHIPNAME]
target create $_TARGETNAME arm9tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm946t
speed up memory downloads
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
#workaround: HW breakpoints
gdb_breakpoint_override hard
#flash bank <chip_width> <bus_width>
set _FLASHNAME $_CHIPNAME.flash0
flash bank $_FLASHNAME cfi 0x30000000 0x00400000 2 2 $_TARGETNAME
jtag_rclk 3000
#enable workspace
#$_TARGETNAME configure -work-area-phys 0x207F0000 -work-area-size 0x10000 -work-area-backup 1
$_TARGETNAME configure -work-area-phys 0x207F0000 -work-area-size 0x10000 -work-area-backup 1
gdb_flash_program disable
jtag_rclk 3000
echo “1111”
$_TARGETNAME configure -event reset-start { echo “2222”
jtag_rclk 16
}
$_TARGETNAME configure -event reset-init {
We can increase speed now that we know the target is halted.
jtag_rclk 3000
echo “3333”
puts “Running reset init script for EBx00 Board”
Init values
mww 0x70000004 0x40000080 # Async Wait Cycle Config
mww 0x7000000C 0x00000320 # SDRAM Refresh Control
mww 0x70000010 0x04622311 # Async Bank 0 Config (16 bit flash)
#mww 0x70000014 0x04622312 # Async Bank 1 Config (SRAM)
#mww 0x70000018 0x04622312 # Async Bank 2 Config (CPLD)
#mww 0x7000001C 0x44622312 # Async Bank 3 Config (FPGA)
mww 0x70000020 0x03030100 # Extended Config: 16-bit SDRAM bank data size,
mww 0x70000008 0x00002421 # SDRAM Bank Config: 9 column adress lines, 4 banks, 12-row address lines, CAS latency = 3
#Memory Swap => SDRAM at address 0x00 to set vectors
mww 0x40002644 0x00000001 # MEM_SWAP
}
#$_TARGETNAME configure -event debug-halted {
puts “Running debug halted script for EBx00 Board”
#}
$_TARGETNAME configure -event gdb-attach {
puts “Running gdb-attach script for EBx00 Board”
}
$_TARGETNAME configure -event gdb-detach {
puts “Running gdb-detach script for EBx00 Board”
}
$_TARGETNAME configure -event gdb-flash-erase-start {
puts “Running gdb-flash-erase-start script for EBx00 Board”
}
$_TARGETNAME configure -event gdb-flash-erase-end {
puts “Running gdb-flash-erase-end script for EBx00 Board”
}
$_TARGETNAME configure -event gdb-start {
puts “Running gdb_start script for EBx00 Board”
}
$_TARGETNAME configure -event gdb-end {
puts “Running gdb_halted script for EBx00 Board”
}
================
Previously, I was encountering error at “flash bank”. Previously, it was flash_bank, I changed it to flash bank and added that new line as per requirement. Then I am getting this error as shown above.
Can anyone guide me please. I think this script was meant for openocd 0.2.0. I am using openocd0.4.0 from http://www.freddiechopin.info/.