I’m stuck and need some help from you more experienced BPCB/Eagle users.
I’ve made several boards with no problems, but my last one came back with soldermask covering the lands for some of my parts.
At first I thought I’d made the packages wrong in Eagle PCB, but the same packages are used elsewhere on the board and work fine (for example, the R0805 package).
Here’s a picture of the back side of the board, with the problem area circled in red:
I had some boards from another supplier a few years ago with that problem, they sent me new set of boards. I scraped off the solder mask and was able to test a board, before the new ones arrived.
I’ve been pulling my hair out for the better part of a day trying to figure out what I did wrong. I looked at the gerbers too - they also look fine to me.
It’s nice to have some confirmation that maybe it wasn’t my fault. (Maybe.)
I’ve just written to BatchPCB support about it - I’ll see what they say.
Now I need to figure out why my pours of different signals didn’t get isolated from one another…
I’m still stumped. I wrote to support @ batchpcb, and Patrick answered, saying he’d checked my Gerbers in both FAB3000 and Gerbv, and it looked to him like the pads were supposed to be covered with soldermask. Here’s the screen capture he sent me:
Why are the problem parts highlighted in Patrick’s FAB 3000 screen shot?
If I understand Patrick correctly, they’re not highlighted, they’re a different color because they are supposed to be covered with soldermask.
Here is his email to me, verbatim:
Here is a screen shot of your design in FAB3000 the program we use to panelize. The program imports the zip, and separates the designs into layers to be viewed. You can see that only the gbl, gbs and the gto
layers are turned on (visible) and all the other layers are not. This screen shot shows, that based on the info from the zip file, solder mask was supposed to cover those pads completely. I checked the files in Gerbv as well and the same result was found. I would maybe try re-caming your files, maybe something went wrong during that process.
If you take a look at the picture, you can see that all the pads on the bottom layer look different from the pads that you are inquiring about.
That is because they are completely covered by soldermask, instead of just the edges (like the other gbl pads). If there is anything else I can help out with, feel free to ask.
It’s not just the soldermask that’s wrong. IC10 looks as if only part of it etched on the copper layer. How does that gerber look?
There’s some weird-looking routing going on on that board: Is this by design or is it a gerber problem too?
There are overlapping polygons of the same rank… overlapping polygons for different signals must have different ranks or they won’t be isolated from each other. A DRC catches this problem with clearance errors.
I don’t see how it would affect the soldermask layer though.
Do you have the images of the DRC from your BatchPCB submission?
I re-uploaded the original Gerbers to the BatchPCB site; the result is attached ("RepeatCheck.pdf" inside the ZIP mentioned below). The bottom soldermask is fine.
I think I’ve figured out what went wrong.
My original Gerbers were fine (at least as far as the soldermask goes). I think the soldermask problem was introduced when BatchPCB panelized the board for production at GP. It only showed up in the panelized Gerbers that Patrick showed me.
It’s not just the soldermask that’s wrong. IC10 looks as if only part of it etched on the copper layer. How does that gerber look?
There’s some weird-looking routing going on on that board: Is this by design or is it a gerber problem too?
I know; I had a problem on this board with my copper pours; I didn't set the ranks properly for overlapping pours, so signals got interconnected that weren't supposed to be (that's what happened with IC10 and some other strange things on the back of the board). But that only affected the copper layer, not the soldermask.
