seulater:
I don’t know if I should leave my current via @ 20mil hole with a 30mil pad. Or I should drop down to a 16mil hole with a 30mil pad.
30/20 = 1.5 or 50%. A more reasonable ratio is 1.2
seulater:
Going to a lower size hole will give me more annular ring area which board houses charge more the less annular ring area you got.
You need a new board house…
seulater:
But going to a 16mil hole has me wondering this: are there any downfalls with going to a 16mil hole from a 20mil, and what are the reasons once would use a 16mil hole over say a 32mil hole ?
Who's idea is that? What value would the board house like to see
to avoid penalties?
seulater:
Does the larger hole give me more current carrying ability only ?
Depends upon the copper thickness and width of
the trace (track) running in and out of the via.
When the trace is wider than the min via ring diameter I bump the via
hole up to maintain the same approximate ratios. i.e. a 40mil hole
48mil ring diameter for either a 20mil trace or a 50mil trace
(I try to reduce the number of different drills - there was a time
when tool changes were a cost adder, but BatchPCB/GP doesn’t
seem to care).
seulater:
How does the different sizes affect freq on the line as well
As well as what? Unless you are trying to pass RF
voltages or multi-hundred megahertz clocks I doubt you will
see a frequency dependance. Matched trace length delays would
come into play before trace impedance was an issue. The industry
is limited to about a +/- 10% tolerance on Zo.