Hi!
I have big problems understanding and configure my OpenOCD environment. My intentions is to flash redboot back to my defunc Lacie Ethernet Raid (which is a Intel ss4000E-clone).
I have scavenge the net including this forum, google and openocd mailinglist and tried many different configurations, read the openocd and Linux kernel source but I don’t know how to think and where to begin. I wrote [this question a couple of months ago but no one replied.
[Here are some details about the hardware. Which information about the CPU/Flash/Memory/etc do I need to find out? I have downloaded every PDF from Intel about this hardware I have stumbled upon, but don’t know what is important etc. I have the source for redboot including pre-compiled binarys for my hardware.
Point me in the right direction; Where do I begin to debug my configuration?](http://em7210.kwaak.net/cgi-bin/trac.cgi/wiki/HardwareDetails)]([Openocd-development] How to proceed with my EM7210 (Xscale)?)
You’d (probably) need to implement new JTAG target and new Flash driver into OpenOCD - pretty hard task IMHO.
4/3!!
Sorry about the late reply, I was waiting the delivery of a jtagkey tiny, which made no difference other than economical.
Freddie Chopin:
You’d (probably) need to implement new JTAG target and new Flash driver into OpenOCD - pretty hard task IMHO.
That is fine, I just don’t know where to start and go from there.
I am using the PXA255 config right now since it is the closest to my board, accually, I haven’t found any big differences between the XScale variants in the source code other than the “ir_length” which can be 5 or 7.
The errors I get all the time is “Failed to receiving data from debug handler after 1000 attempts” and “time out writing RX register” which I guess I have to adress firstly, but how?
If I do a “poll” I usually get this values:
background polling: on
TAP: pxa255.cpu (enabled)
target state: halted
target halted in ARM state due to undefined, current mode: User
cpsr: 0x00000000 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Should the cpsr/pc values accually be 0?
As you see I am a bit lost but I really have tried to find out answers myself but now I really don’t know how to proceed.