I use openocd-v188, ARM is LM3S101, but I don’t know to write LM3S101 configuration file ?
help !
thanks !
I use openocd-v188, ARM is LM3S101, but I don’t know to write LM3S101 configuration file ?
help !
thanks !
Refer the link given below… this PDF explains how to write configuration files
for any processor using Open OCD
http://www.fh-augsburg.de/~hhoegl/proj/ … ickref.pdf
(download the updated version, will save some time)
Regards,
Mihir
For the LM3S101 you should use for target and flash:
#target
target cortex_m3 little reset_halt 0
working_area 0 0x20000000 0x600 nobackup
#flash configuration
flash bank stellaris 0 0 0 0 0
Regards,
Magnus
mlu:
For the LM3S101 you should use for target and flash:#target
target cortex_m3 little reset_halt 0
working_area 0 0x20000000 0x600 nobackup
#flash configuration
flash bank stellaris 0 0 0 0 0
Regards,
Magnus
I could use some hints along these lines for the LM3S8xx parts. They have 64KB flash and 8KB RAM.
So I would guess the target line would be the same, but I don’t know about the rest.
The LM3S8xx parts should work with the same settings as LM3S101.
Flash size is autodetected, and RAM size is not a problem.
For the eval boards with integrated FT2232 JTAG interface ( evb_lm3s811) the settings should be something like:
interface ft2232
jtag_speed 0
ft2232_layout evb_lm3s811
ft2232_vid_pid 0x0403 0xBCD9
Regards,
Magnus
I’m actually trying to get it to go using an Amontec JTAGKey through the direct JTAG port instead of the provided SWD. So I have OpenOCD built to use the FTDI lib to get to the JTAGKey which in turn will be plugged into the EVB.
I’m on Intel Mac / OSX, starting from the work here:
viewtopic.php?p=32347&sid=e14b38a536e98 … c7f7f8865b
Edit: OK, some progress. Using this config file I seem to be able to get the JTAGkey to halt/resume the CPU on the Stellaris EVB, so this is a good sign.
#daemon configuration
telnet_port 4444
gdb_port 3333
#interface
interface ft2232
ft2232_device_desc “Amontec JTAGkey”
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xCFF8
jtag_speed 10
jtag_nsrst_delay 500
jtag_ntrst_delay 500
#LM3S811 Evaluation Board has only srst
reset_config srst_only separate
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target
target cortex_m3 little run_and_halt 0
working_area 0 0x20000800 0x1200 nobackup
#working_area 0 0x20000000 0x2000 nobackup
#target_script 0 reset evb_lm3s811_flash.script
#flash configuration
flash bank stellaris 0 0 0 0 0
… I went a few rounds trying to get the onboard USB/SWD interface to play ball without success. Jim Lynch’s tutorial saved the day as it had a complete config for OpenOCD+JTAGkey that I cribbed from.
Now let’s see if we can erase and flash this chip…
Edit: OK, I can erase it and flash it successfully, however I can’t seem to get it to run while the JTAGkey is in the picture. If I power down, unhook the JTAGkey, and power up, it runs the code I loaded just fine. But if I try to do a “reset run” through the telnet interface, I usually get this right away and no hint of output:
reset run
Target 0 halted
target halted in Thumb state due to debug request, current mode: Thread
xPSR: 0x61000000 pc: 0x20000004