How use gerber zip from opencores.org project

I’m building a prototype that will make use of an fpga, microcontroller, and PCI interface. So far I’ve found three prototype boards that have two of the three – fpga and PCI – listed below:

  1. http://www.knjn.com/ShopBoards_PCI.html

  2. http://www.plda.com/prodetail.php?pid=50

  3. http://www.opencores.org/projects.cgi/w … i/overview

Option (1) is out of stock and I suspect option (2) is very expensive considering a price is not listed anywhere.

That leaves the “open” hardware option (3) which is listed at a very reasonable price.

What I don’t know is how to take the files provided by the opencores project and get the board made. I assume I take the gerber zip and send it to some kind of board manufacturer? If this is the case can you recommend an economical and reliable company to go through?

The zip can be found here:

http://www.opencores.org/cvsweb.shtml/i … er-1_1.zip

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Update

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I figured out that what I need to do is send the provided gerber files to a PCB manufacturer (or buy a board making machine myself which is a road I def don’t want to go down). With the help of http://del.icio.us, I found www.batchpcb.com. However, when I upload the iiepci-board-gerber-1_1.zip, I get the following errors and warnings:

Warning:GerberFile - filetype of iiepci_11_bottom_internal_layer.GP2 unknown!
Warning:GerberFile - filetype of iiepci_11_top_internal_layer.GP1 unknown!

Caution: I was unable to identify some of the files submitted. You may adjust the filenames to match the layer types below if you find that I have matched some of them incorrectly.
NOTE: Please pay attention to this step carefully - careless naming can result in a board being wrongly produced! Do NOT, for instance, call a stencil layer a Bottom Mask - this will not work, and you may get a broken board :(. If you have questions, please see the tutorial or feel free to join the forum and ask for help.

The upload process also has many drop-down menus with things like “Top Copper:”, “Bottom Silk:”, and “Middle Layer 2:” I see that the zip has useful filenames like “iiepci_11_bottom_layer.GBL,” but I still can’t figure out the exact mapping.

Thanks in advance,

Robert

http://juzzam.org

As i don’t wanna join the project i don’t really know what to say that will help you out…

I did find [this wiki tho, but the thing with Gerber’s is that there isn’t really a standard file

naming scheme so all you can do is use a gerber viewer like [Viewplot or [GC-Prevue and

have a look, other than that, i don’t think i can be any more use :(…

But by all means, support Sparkfun by using [BatchPCB :wink:.](http://www.batchpcb.com/)](http://www.graphicode.com/)](http://www.viewplot.com/)](Gerber format - Wikipedia)

Juzzling:

Warning:GerberFile - filetype of iiepci_11_bottom_internal_layer.GP2 unknown!

Warning:GerberFile - filetype of iiepci_11_top_internal_layer.GP1 unknown!

Caution: I was unable to identify some of the files submitted. You may adjust the filenames to match the layer types below if you find that I have matched some of them incorrectly.
NOTE: Please pay attention to this step carefully - careless naming can result in a board being wrongly produced! Do NOT, for instance, call a stencil layer a Bottom Mask - this will not work, and you may get a broken board :(. If you have questions, please see the tutorial or feel free to join the forum and ask for help.




The upload process also has many drop-down menus with things like "Top Copper:", "Bottom Silk:", and "Middle Layer 2:" I see that the zip has useful filenames like "iiepci_11_bottom_layer.GBL," but I still can't figure out the exact mapping.



Thanks in advance,

Robert

[http://juzzam.org](http://juzzam.org)

Make sure you’re creating a 4 layer board in BatchPCB. I’ve never tried personally using BatchPCB for that, so can’t give you any pointers :). Other options you can try, if you need more than Qty 1, are PCBFabExpress and GoldPhoenix (out of China, but good whole panel pricing).

Hi Robert,

I just checked the files - the layers should actually be pretty easy to figure out; the two “internal” layers are middle copper layers (it is a 4 layer board). The other messages are just warnings - you can safely ignore them if you have dealt with what the messages are saying.

However, I found a more difficult problem with the drill file - I am not sure who released these gerbers, but the drill file is exported with both leading and trailing zeros omitted. This is not legal and most rendering programs will not be able to place the drill hits correctly - check the design out in gerbv (its free: gerbv.sf.net) and you will see what I mean.

It would be great if you could point this out the the opencores people; best would be if they can export the drill file with no zeros optional/omitted; this will make it less likely to have errors on production. I managed to manually edit the file and get it to work (several regex search and replaces later …), but I am still not quite sure that the hits are all correct.

–Erik