Laying out a 0.8mm pitch BGA, an LPC3250

Its my first foray into dense tight pitch BGA’s (296 ball 0.8mm pitch), and I’m encountering problems with the rules I find at most board houses for Eagle (5.7 Pro) .

I can’t seem to get past any DRC checks, based on 0.3mm pads at 0.8mm pitch with 6mil tracks. The standard 3mil Non-solder mask defined pads BGA seem to get too close to the vias that I have to use to route tracks from the inner layers of balls are always too close to the tracks I’m routing on the inner layers.

It seems to me that even using the smallest vias the rules allow, I can;t get tracks to the inner pads of the BGA.

It looks like I’d have to consider vias-in-pad type solutions which I’ve heard very conflicting opinions about.

Has anyone successfully routed an LPC3250 (i’m trying to route to a similarly tight SDR DRAM BGA) with ‘normal’ rules for a 6 layer board from a few board houses without having to go to exotic DRC rules and much more expensive boards (dammit 6 layer are already around $200 a shot or more and I don’t want to waste that kind of money without asking you guys for some help/experience :slight_smile: )

Any hints tips appreciated.

Peter

You need to go a lot smaller, and it will be expensive. See the PCB Matrix recommendations.

Plugged vias are expensive, I’d forget them.

Thanks Leon, that is my fear, this is goingto cost too much to be a hobby, I’m gonna need to make money with this thing if its going to get built…

What/Where are the "PCB Matrix Recommendations’ you referred to ?

http://www.pcbmatrix.com

The documents are in the Downloads > General Documents section. I can’t provide a link to them.

Thanks Leon, there is plenty of good bedtime reading there…thats a nice resource.

Peter

prosys:
Thanks Leon, there is plenty of good bedtime reading there…thats a nice resource.

Peter

Their forum is very good.

Well I managed to route the BGA with a slight tweak or two to the design rules and I’ve managed to stay within the cheaper of the expensive 6 layer rules. (through vias, and reasonable 5/5 trace space, 8 mil via drills, I compromised on the NSMD BGA pads at only 3mil-over).

So… I’ve demonstrated to myself that I can get the traces out of the BGA and set up what I think are reasonable design rules for Eagle.

Now I will start over and make a neat job of it and try to incorporate some proper layout rules for the SDR/DDR memory interfaces.

Thanks for the references…

Peter