Layout considerations with an ADC

I’ve come to a particular stage of a project, and with horror I realise I’m going to have to use an ADC. I try to avoid the analogue world where possible :slight_smile:

I’ve only really played around with ADCs on breadboard(!) which is about as non-ideal as you can get - you probably won’t be surprised to hear that the readings were as noisy as anything.

Do I have the general right end of the stick if I do the following on my PCB, which will be 2 layer:

  • Ground plane under the ADC.

  • Decoupling for the ADC supply pins: a couple of 0.1uF multilayer ceramics in parallel.

  • Upstream of this, a choke to reduce supply noise reaching the ADC.

  • Short traces to the connector that goes out to the shielded cable.

The signal to be sampled is very low frequency (changing at less than 1Hz), so I could also add a low pass filter to the analogue inputs and also average the inputs over a period of two or three seconds, but I’d like to get the best performance possible out of the ADC in the first place.

The ADC itself is free-from-the-parts-bin (i.e. a salvage from redundant kit!) in a DIP package, an ADC0803 if memory serves (I don’t have it right in front of me but I’m pretty sure I remember it correctly).

It’s a good idea to have a split ground plane. Many ADC manufacturers have layout details in the data sheet.

A lot depends on the size of the signal.

You are on the right lines, anyway.

Why not use an MCU with a built-in ADC? It makes things much easier, although most only offer 10 or 12 bits.

Leon

It’s for a Z80 based system, and I think a microcontroller will be hard pressed to keep up with the I/O read cycles of the CPU, which may be running up to 8MHz. Thanks to some redundant kit, I have more of these ADCs than you can shake a stick at - but I don’t have any microcontrollers to hand with an onboard ADC (the nearest I have only has a comparator).