After a lengthy haitus where I mostly played with ST parts, I’m working with an LPC1768. And I’m really struggling with the bootloader when re-flashing.
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LPC1768FBD100
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bargain(?) (sub-)basement [dev board
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20 pin JTAG (not SWD), tRST and sRST separate
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Olimex [ARM-USB-OCD
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openOCD 0.6.1
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telnet interface
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host is i686, Linux 3.8.5 (don’t think this is important…)
After hours of experimentation, I’ve temporarily adopted the following flash sequence:
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reset_config trst_and_srst (configure reset to drive both tRST and sRST)
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halt
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[flash vector table is now at address 0]
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erase** appropriate sectors
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reset halt
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[ROM vector table is now at address 0]
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flash write_image unlock path-to-hex 0 ihex (flash image)
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reset
I’m curious whether anyone has a less cumbersome procedure, especially with openOCD. Maybe this should be in the openOCD forum, but I thought some of the Crossworks or IAR users might have insight on the LPC1768 flashing process. I don’t try to provide any log files etc.at this point because my efforts so far have been too random to be useful. I don’t-know-anything-about / didn’t-check how openOCD actually implements a command such as flash write_image erase unlock.
**various / repeated attempts to erase and write prior to the first reset will erase, but not write the new code (I did manage to write garbage in sector 0 by playing with the MEMMAP register @ 0x400fc040).](JTAG USB OCD Programmer/Debugger for ARM processors - PGM-07834 - SparkFun Electronics)](LPC1768-Mini-DK2 Development board + 2.8 TFT LCD [LPC1768-Mini-DK2] - US $36.00 : HAOYU Electronics : Make Engineers Job Easier)