openocd 0.3.1 or 0.4.0.rc1 lpc17x

Does anybody use openocd with lpc17x (lpc1768).

I use this openocd config:

#
# For more information about the configuration files, take a 
# look at the "Open On-Chip Debugger (openocd)" documentation.
#
source [find interface/jtagkey.cfg]
source [find target/lpc1768.cfg]

I use Eclipse GDB Hardware Debugging:

target extended-remote localhost:3333
monitor reset
monitor soft_reset_halt
monitor mww 0xE01FC040 0x0001
load

Runtime Options breakpoint at main and resume

with open ocd Debugger 0.4.0-rc1

Open On-Chip Debugger 0.4.0-rc1 (2010-01-06-11:53)
For bug reports, read
	http://openocd.berlios.de/doc/doxygen/bugs.html
jtag_nsrst_delay: 200
jtag_ntrst_delay: 200
trst_and_srst srst_pulls_trst srst_gates_jtag trst_push_pull srst_open_drain
500 kHz
Info : device: 4 "2232C"
Info : deviceID: 67358712
Info : SerialNumber: 32OZPDQCA
Info : Description: Amontec JTAGkey A
Info : clock speed 500 kHz
Info : JTAG tap: lpc1768.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : lpc1768.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : accepting 'telnet' connection from 0

i got these errors :

arm-none-eabi-gdb.exe

target extended-remote localhost:3333
0x00000000 in g_pfnVectors ()
monitor mww 0xE01FC040 0x0001
tbreak main
Temporary breakpoint 2 at 0x1e2
continue
Note: automatically using hardware breakpoints for read-only addresses.

Program received signal SIGTRAP, Trace/breakpoint trap.
0x00000000 in g_pfnVectors ()

and openocd telnet

accepting 'gdb' connection from 0
acknowledgment received, but no packet pending
JTAG tap: lpc1768.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
target state: halted
target halted due to breakpoint, current mode: Handler HardFault
xPSR: 0x20000003 pc: 00000000 msp: 0x100007b8
requesting target halt and executing a soft reset
target state: halted
target halted due to breakpoint, current mode: Thread 
xPSR: 0x01000000 pc: 0x00001168 msp: 0x10000808
AHBAP Cached values: dp_select 0x0, ap_csw 0xa2000012, ap_tar 0xffffffff
SWJ-DP STICKY ERROR
Read MEM_AP_CSW 0x23000052, MEM_AP_TAR 0xe01fc044
AHBAP Cached values: dp_select 0x0, ap_csw 0xa2000012, ap_tar 0xffffffff
SWJ-DP STICKY ERROR
Read MEM_AP_CSW 0x23000052, MEM_AP_TAR 0xe01fc044
Block write error address 0xe01fc040, wcount 0x1
Command handler execution failed
  lled at file "command.c", line 637
  lled at file "command.c", line 352
Verification will fail since checksum in image (0x00000000) to be written to flash is different 
from calculated vector checksum (0xefffb0bc).
To remove this warning modify build tools on developer PC to inject correct LPC vector checksum.

So Debugging doesn´t work. I use Codesoury Lite and the ARM Eclipse Plugin to build the source.

When i use FlashMagic to flash the chip the program works fine.

Does anybody see whats could be wrong ?

thanks

mgiaco

Does anyone uses LPC17xx and use Openocd for debugging?

mgiaco,

I don’t use LPC17xx, and I don’t understand all the error messages.

But I suggest you try calculating your vector checksum by hand and manually putting it in your crt.s file. I think flashmagic, like the NXP utility, calculates the checksum for you before upload. Open OCD does not. (There surely is a way to have Eclipse do it for you; I’ve not taken the time to get Eclipse and openocd working together on my system.)

Good luck!

-hugh

hello hsutherl,

So that wasn´t the fault, but i got it to work.

thx mgiaco

Just for the record - using “soft_reset_halt” before “load” is known to cause problems, so - don’t. Use “reset halt” instead.

4/3!!

mgiaco82 - how exactly did you get OpenOCD to work? I have been trying with a JTagKeyTiny and the Olimex ARM-USB-OCD. I can’t make either part work. They seem to initialize and identify the parts right, but uploading .bin files doesn’t appear to work.

I do know I have both the Olimex and Amontec installed right - they both work in CrossWorks properly.

I believe that my problem lies in the .cfg file I am trying to use to upload my program to the LPC1768.

Thanks in advance.